llvm-6502/test/CodeGen/X86/2012-03-15-build_vector_wl.ll

11 lines
340 B
LLVM

; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
; CHECK: build_vector_again
define <4 x i8> @build_vector_again(<16 x i8> %in) nounwind readnone {
entry:
%out = shufflevector <16 x i8> %in, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
; CHECK: shufb
ret <4 x i8> %out
; CHECK: ret
}