llvm-6502/test/CodeGen
Alex Lorenz 65266361a1 Fix MIR testcase committed in r237708 - remove target triple.
Remove the target specific triple and datalayout from the 
llvm IR in the MIR testcase file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237723 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-19 20:51:48 +00:00
..
AArch64 Revert r237579, as it broke windows buildbots 2015-05-18 16:39:16 +00:00
ARM ARM: allow jump tables to be placed as constant islands. 2015-05-18 17:10:40 +00:00
BPF
CPP
Generic MIR Serialization: print and parse LLVM IR using MIR format. 2015-05-19 18:17:39 +00:00
Hexagon [Hexagon] Generate hardware loop for a vectorized loop 2015-05-14 20:36:19 +00:00
Inputs
Mips [mips] Correct and improve special-case shuffle instructions. 2015-05-19 12:24:52 +00:00
MIR Fix MIR testcase committed in r237708 - remove target triple. 2015-05-19 20:51:48 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Add extra r2 read deps on @toc@l relocations 2015-05-18 06:25:59 +00:00
R600 R600/SI: add pass to mark CF live ranges as non-spillable 2015-05-12 17:13:02 +00:00
SPARC Add support for the Sparc implementation-defined "ASR" registers. 2015-05-18 16:29:48 +00:00
SystemZ
Thumb
Thumb2 ARM: allow jump tables to be placed as constant islands. 2015-05-18 17:10:40 +00:00
WinEH Changed renaming of local symbols by inserting a dot vefore the numeric suffix. 2015-05-12 16:47:30 +00:00
X86 [X86] ABI change for x86-32: pass 3 vector arguments in-register instead of 4, except on Darwin. 2015-05-19 11:06:56 +00:00
XCore