Tom Stellard 653ef32216 MISched: Fix moving stores across barriers ... This fixes an issue with ScheduleDAGInstrs::buildSchedGraph where stores without an underlying object would not be added as a predecessor to the current BarrierChain. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223717 91177308-0d34-0410-b5e6-96231b3b80d8		2014-12-08 23:36:48 +00:00
..
AArch64	AArch64: treat HFAs containing "half" types as blocks too.	2014-12-08 17:54:58 +00:00
ARM	Add missing FP build attribute tests.	2014-12-05 08:22:47 +00:00
CPP
Generic	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Hexagon	Handle ctor/init_array initialization.	2014-11-03 14:56:05 +00:00
Inputs	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Mips	[mips] Fix passing of small structures for big-endian O32.	2014-12-02 20:40:27 +00:00
MSP430
NVPTX	[NVPTX] Do not emit .weak symbols for NVPTX	2014-12-01 21:16:17 +00:00
PowerPC	[PowerPC] Don't use a non-allocatable register to implement the 'cc' alias	2014-12-08 22:54:22 +00:00
R600	MISched: Fix moving stores across barriers	2014-12-08 23:36:48 +00:00
SPARC
SystemZ
Thumb	Re-add support to llvm-objdump for Mach-O universal files and archives with -macho	2014-12-04 23:56:27 +00:00
Thumb2	ARM: allow constpool entry to be moved to the user's block in all cases.	2014-11-13 17:58:53 +00:00
X86	[CompactUnwind] Fix register encoding logic	2014-12-08 18:18:32 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00