llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-11-04 22:07:27 +00:00

History

Matt Arsenault 29ad7506e1 Combine fcmp + select to fminnum / fmaxnum if no nans and legal Also require unsafe FP math for no since there isn't a way to test for signed zeros. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225744 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-13 00:43:00 +00:00
..
32-bit-local-address-space.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
64bit-kernel-args.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
128bit-kernel-args.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
add_i64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
add-debug.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
add.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
address-space.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
and.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
anyext.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
array-ptr-calc-i32.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
array-ptr-calc-i64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
atomic_cmp_swap_local.ll	R600/SI: Add a V_MOV_B64 pseudo instruction	2015-01-07 20:27:25 +00:00
atomic_load_add.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
atomic_load_sub.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
basic-branch.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
basic-loop.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
bfe_uint.ll
bfi_int.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
big_alu.ll
bitcast.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
bswap.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
build_vector.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
call_fs.ll
call.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
cayman-loop-bug.ll
cf_end.ll
cf-stack-bug.ll
codegen-prepare-addrmode-sext.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
combine_vloads.ll
commute_modifiers.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
complex-folding.ll
concat_vectors.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
copy-illegal-type.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
copy-to-reg.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ctlz_zero_undef.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ctpop64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ctpop.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
cttz_zero_undef.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
cvt_f32_ubyte.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
dagcombiner-bug-illegal-vec4-int-to-fp.ll
default-fp-mode.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
disconnected-predset-break-bug.ll
dot4-folding.ll
ds_read2_offset_order.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ds_read2.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ds_read2st64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ds_write2.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ds_write2st64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ds-negative-offset-addressing-mode-loop.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
elf.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
elf.r600.ll
empty-function.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
extload.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
extract_vector_elt_i16.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fabs.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fabs.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fadd64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fadd.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fceil64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fceil.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fcmp64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fcmp-cnd.ll
fcmp-cnde-int-args.ll
fcmp.ll
fconst64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fcopysign.f32.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fcopysign.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fdiv64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fdiv.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fetch-limits.r600.ll
fetch-limits.r700+.ll
ffloor.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
flat-address-space.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
floor.ll
fma.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fma.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fmad.ll
fmax3.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fmax_legacy.f64.ll	R600: Fix min/max matching problems with unordered compares	2014-12-12 02:30:37 +00:00
fmax_legacy.ll	Combine fcmp + select to fminnum / fmaxnum if no nans and legal	2015-01-13 00:43:00 +00:00
fmax.ll
fmaxnum.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fmaxnum.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fmin3.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fmin_legacy.f64.ll	R600: Fix min/max matching problems with unordered compares	2014-12-12 02:30:37 +00:00
fmin_legacy.ll	Combine fcmp + select to fminnum / fmaxnum if no nans and legal	2015-01-13 00:43:00 +00:00
fmin.ll
fminnum.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fminnum.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fmul64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fmul.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fmuladd.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fnearbyint.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fneg-fabs.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fneg-fabs.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fneg.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fneg.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
fp16_to_fp.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fp32_to_fp16.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fp_to_sint.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fp_to_sint.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fp_to_uint.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fp_to_uint.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fp-classify.ll	R600/SI: Add combine for isinfinite pattern	2015-01-06 23:00:46 +00:00
fpext.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fptrunc.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
frem.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fsqrt.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fsub64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
fsub.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ftrunc.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
ftrunc.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
gep-address-space.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
global_atomics.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
global-directive.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
global-zero-initializer.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
gv-const-addrspace-fail.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
gv-const-addrspace.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
half.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
hsa.ll	R600/SI: Set the ATC bit on all resource descriptors for the HSA runtime	2014-12-02 17:05:41 +00:00
i1-copy-implicit-def.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
i1-copy-phi.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
i8-to-double-to-float.ll
icmp64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
icmp-select-sete-reverse-args.ll
imm.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
indirect-addressing-si.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
indirect-private-64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
infinite-loop-evergreen.ll
infinite-loop.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
inline-asm.ll	R600/SI: Enable inline assembly	2014-12-03 04:08:00 +00:00
inline-calls.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
input-mods.ll
insert_subreg.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
insert_vector_elt.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
jump-address.ll
kcache-fold.ll
kernel-args.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
large-alloca.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
large-constant-initializer.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
lds-initializer.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
lds-oqap-crash.ll
lds-output-queue.ll
lds-size.ll
lds-zero-initializer.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
legalizedag-bug-expand-setcc.ll
lit.local.cfg
literals.ll
llvm.AMDGPU.abs.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.barrier.global.ll	R600/SI: Insert s_waitcnt before s_barrier instructions.	2015-01-06 19:52:07 +00:00
llvm.AMDGPU.barrier.local.ll	R600/SI: Insert s_waitcnt before s_barrier instructions.	2015-01-06 19:52:07 +00:00
llvm.AMDGPU.bfe.i32.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.bfe.u32.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.bfi.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.bfm.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.brev.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.clamp.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.class.ll	R600/SI: Add basic DAG combines for fp_class	2015-01-06 23:00:39 +00:00
llvm.AMDGPU.cube.ll
llvm.AMDGPU.cvt_f32_ubyte.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.div_fixup.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.div_fmas.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.div_scale.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.amdgpu.dp4.ll
llvm.AMDGPU.fract.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.imad24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.imax.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.imin.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.imul24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.kill.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.amdgpu.kilp.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.ldexp.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.legacy.rsq.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.amdgpu.lrp.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.mul.ll
llvm.AMDGPU.rcp.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.rcp.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.rsq.clamped.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.rsq.clamped.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.rsq.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.tex.ll
llvm.AMDGPU.trig_preop.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.trunc.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.umad24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.umax.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.umin.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.AMDGPU.umul24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.cos.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.exp2.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.floor.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.log2.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.memcpy.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.pow.ll
llvm.rint.f64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.rint.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.round.ll
llvm.SI.fs.interp.constant.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.gather4.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.getlod.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.image.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.image.sample.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.image.sample.o.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.imageload.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.load.dword.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.resinfo.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.sample-masked.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.sample.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.sampled.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.sendmsg.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.tbuffer.store.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.SI.tid.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.sin.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
llvm.sqrt.ll
llvm.trunc.ll
load64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
load-i1.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
load-input-fold.ll
load.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
load.vec.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
local-64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
local-atomics64.ll	R600/SI: Add a V_MOV_B64 pseudo instruction	2015-01-07 20:27:25 +00:00
local-atomics.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
local-memory-two-objects.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
local-memory.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
loop-address.ll	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
loop-idiom.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
lshl.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
lshr.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
m0-spill.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
mad_int24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
mad_uint24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
mad-sub.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
max3.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
max-literals.ll
max.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
min3.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
min.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
missing-store.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
mubuf.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
mul_int24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
mul_uint24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
mul.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
mulhu.ll	R600/SI: Commute instructions to enable more folding opportunities	2015-01-07 22:44:19 +00:00
no-initializer-constant-addrspace.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
no-shrink-extloads.ll	Add target hook for whether it is profitable to reduce load widths	2014-12-12 00:00:24 +00:00
operand-folding.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
operand-spacing.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
or.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
packetizer.ll
parallelandifcollapse.ll
parallelorifcollapse.ll
predicate-dp4.ll
predicates.ll
private-memory-atomics.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
private-memory-broken.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
private-memory.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
pv-packing.ll
pv.ll
r600-encoding.ll
r600-export-fix.ll
r600-infinite-loop-bug-while-reorganizing-vector.ll
r600cfg.ll
README
reciprocal.ll
register-count-comments.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
reorder-stores.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
rotl.i64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
rotl.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
rotr.i64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
rotr.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
rsq.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
rv7x0_count3.ll
s_movk_i32.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
saddo.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
salu-to-valu.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
scalar_to_vector.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
schedule-fs-loop-nested-if.ll
schedule-fs-loop-nested.ll
schedule-fs-loop.ll
schedule-global-loads.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
schedule-if-2.ll
schedule-if.ll
schedule-kernel-arg-loads.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
schedule-vs-if-nested-loop-failure.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
schedule-vs-if-nested-loop.ll
sdiv.ll	R600/SI: Commute instructions to enable more folding opportunities	2015-01-07 22:44:19 +00:00
sdivrem24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
select64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
select-i1.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
select-vectors.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
select.ll
selectcc-cnd.ll
selectcc-cnde-int.ll
selectcc-icmp-select-float.ll
selectcc-opt.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
selectcc.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
set-dx10.ll
setcc64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
setcc-equivalent.ll
setcc-opt.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
setcc.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
seto.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
setuo.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
sext-eliminate.ll
sext-in-reg.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
sgpr-control-flow.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
sgpr-copy-duplicate-operand.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
sgpr-copy.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
shared-op-cycle.ll
shl_add_constant.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
shl_add_ptr.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
shl.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
si-annotate-cf-assertion.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
si-lod-bias.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
si-sgpr-spill.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
si-triv-disjoint-mem-access.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
si-vector-hang.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
sign_extend.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
simplify-demanded-bits-build-pair.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
sint_to_fp.f64.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
sint_to_fp.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
smrd.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
split-scalar-i64-add.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
sra.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
srem.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
srl.ll	R600/SI: Use RegisterOperands to specify which operands can accept immediates	2015-01-12 19:33:18 +00:00
ssubo.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
store-barrier.ll	MISched: Fix moving stores across barriers	2014-12-08 23:36:48 +00:00
store-v3i32.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
store-v3i64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
store-vector-ptrs.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
store.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
store.r600.ll
structurize1.ll
structurize.ll
sub.ll	R600/SI: Use RegisterOperands to specify which operands can accept immediates	2015-01-12 19:33:18 +00:00
subreg-coalescer-crash.ll	RegisterCoalescer: Fix valuesIdentical() in some subrange merge cases.	2015-01-07 23:58:38 +00:00
swizzle-export.ll
tex-clause-antidep.ll
texture-input-merge.ll
trunc-cmp-constant.ll	Enable (sext x) == C --> x == (trunc C) combine	2014-12-21 16:48:42 +00:00
trunc-store-i1.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
trunc-vector-store-assertion-failure.ll
trunc.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
uaddo.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
udiv.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
udivrem24.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
udivrem64.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
udivrem.ll	R600/SI: Use RegisterOperands to specify which operands can accept immediates	2015-01-12 19:33:18 +00:00
uint_to_fp.f64.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
uint_to_fp.ll	R600/SI: Remove SIISelLowering::legalizeOperands()	2015-01-08 15:08:17 +00:00
unaligned-load-store.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
unhandled-loop-condition-assertion.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
unroll.ll
unsupported-cc.ll
urecip.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
urem.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
use-sgpr-multiple-times.ll	R600/SI: Commute instructions to enable more folding opportunities	2015-01-07 22:44:19 +00:00
usubo.ll	R600/SI: Use RegisterOperands to specify which operands can accept immediates	2015-01-12 19:33:18 +00:00
v1i64-kernel-arg.ll
v_cndmask.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
valu-i1.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
vector-alloca.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
vertex-fetch-encoding.ll
vop-shrink.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
vselect64.ll
vselect.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
vtx-fetch-branch.ll
vtx-schedule.ll
wait.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
work-item-intrinsics.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00
wrong-transalu-pos-fix.ll	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
xor.ll	R600/SI: Use RegisterOperands to specify which operands can accept immediates	2015-01-12 19:33:18 +00:00
zero_extend.ll	R600/SI: Add a stub GCNTargetMachine	2015-01-06 18:00:21 +00:00

README

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.