mirror of
https://github.com/c64scene-ar/llvm-6502.git
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Having these popping up every time you use -debug is really irritating. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204664 91177308-0d34-0410-b5e6-96231b3b80d8
1914 lines
61 KiB
C++
1914 lines
61 KiB
C++
//===-- AMDILCFGStructurizer.cpp - CFG Structurizer -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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/// \file
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//==-----------------------------------------------------------------------===//
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#define DEBUG_TYPE "structcfg"
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#include "AMDGPU.h"
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#include "AMDGPUInstrInfo.h"
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#include "R600InstrInfo.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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#include "llvm/ADT/SCCIterator.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineFunctionAnalysis.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineJumpTableInfo.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachinePostDominators.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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#define DEFAULT_VEC_SLOTS 8
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// TODO: move-begin.
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//===----------------------------------------------------------------------===//
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//
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// Statistics for CFGStructurizer.
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//
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//===----------------------------------------------------------------------===//
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STATISTIC(numSerialPatternMatch, "CFGStructurizer number of serial pattern "
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"matched");
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STATISTIC(numIfPatternMatch, "CFGStructurizer number of if pattern "
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"matched");
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STATISTIC(numLoopcontPatternMatch, "CFGStructurizer number of loop-continue "
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"pattern matched");
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STATISTIC(numClonedBlock, "CFGStructurizer cloned blocks");
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STATISTIC(numClonedInstr, "CFGStructurizer cloned instructions");
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namespace llvm {
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void initializeAMDGPUCFGStructurizerPass(PassRegistry&);
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}
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//===----------------------------------------------------------------------===//
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//
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// Miscellaneous utility for CFGStructurizer.
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//
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//===----------------------------------------------------------------------===//
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namespace {
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#define SHOWNEWINSTR(i) \
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DEBUG(dbgs() << "New instr: " << *i << "\n");
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#define SHOWNEWBLK(b, msg) \
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DEBUG( \
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dbgs() << msg << "BB" << b->getNumber() << "size " << b->size(); \
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dbgs() << "\n"; \
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);
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#define SHOWBLK_DETAIL(b, msg) \
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DEBUG( \
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if (b) { \
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dbgs() << msg << "BB" << b->getNumber() << "size " << b->size(); \
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b->print(dbgs()); \
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dbgs() << "\n"; \
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} \
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);
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#define INVALIDSCCNUM -1
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template<class NodeT>
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void ReverseVector(SmallVectorImpl<NodeT *> &Src) {
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size_t sz = Src.size();
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for (size_t i = 0; i < sz/2; ++i) {
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NodeT *t = Src[i];
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Src[i] = Src[sz - i - 1];
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Src[sz - i - 1] = t;
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}
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}
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} // end anonymous namespace
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//===----------------------------------------------------------------------===//
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//
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// supporting data structure for CFGStructurizer
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//
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//===----------------------------------------------------------------------===//
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namespace {
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class BlockInformation {
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public:
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bool IsRetired;
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int SccNum;
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BlockInformation() : IsRetired(false), SccNum(INVALIDSCCNUM) {}
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};
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} // end anonymous namespace
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//===----------------------------------------------------------------------===//
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//
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// CFGStructurizer
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//
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//===----------------------------------------------------------------------===//
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namespace {
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class AMDGPUCFGStructurizer : public MachineFunctionPass {
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public:
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typedef SmallVector<MachineBasicBlock *, 32> MBBVector;
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typedef std::map<MachineBasicBlock *, BlockInformation *> MBBInfoMap;
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typedef std::map<MachineLoop *, MachineBasicBlock *> LoopLandInfoMap;
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enum PathToKind {
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Not_SinglePath = 0,
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SinglePath_InPath = 1,
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SinglePath_NotInPath = 2
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};
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static char ID;
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AMDGPUCFGStructurizer() :
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MachineFunctionPass(ID), TII(NULL), TRI(NULL) {
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initializeAMDGPUCFGStructurizerPass(*PassRegistry::getPassRegistry());
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}
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const char *getPassName() const {
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return "AMDGPU Control Flow Graph structurizer Pass";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addPreserved<MachineFunctionAnalysis>();
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AU.addRequired<MachineFunctionAnalysis>();
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AU.addRequired<MachineDominatorTree>();
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AU.addRequired<MachinePostDominatorTree>();
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AU.addRequired<MachineLoopInfo>();
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}
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/// Perform the CFG structurization
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bool run();
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/// Perform the CFG preparation
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/// This step will remove every unconditionnal/dead jump instructions and make
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/// sure all loops have an exit block
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bool prepare();
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bool runOnMachineFunction(MachineFunction &MF) {
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TII = static_cast<const R600InstrInfo *>(MF.getTarget().getInstrInfo());
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TRI = &TII->getRegisterInfo();
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DEBUG(MF.dump(););
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OrderedBlks.clear();
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FuncRep = &MF;
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MLI = &getAnalysis<MachineLoopInfo>();
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DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI););
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MDT = &getAnalysis<MachineDominatorTree>();
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DEBUG(MDT->print(dbgs(), (const llvm::Module*)0););
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PDT = &getAnalysis<MachinePostDominatorTree>();
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DEBUG(PDT->print(dbgs()););
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prepare();
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run();
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DEBUG(MF.dump(););
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return true;
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}
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protected:
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MachineDominatorTree *MDT;
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MachinePostDominatorTree *PDT;
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MachineLoopInfo *MLI;
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const R600InstrInfo *TII;
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const AMDGPURegisterInfo *TRI;
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// PRINT FUNCTIONS
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/// Print the ordered Blocks.
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void printOrderedBlocks() const {
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size_t i = 0;
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for (MBBVector::const_iterator iterBlk = OrderedBlks.begin(),
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iterBlkEnd = OrderedBlks.end(); iterBlk != iterBlkEnd; ++iterBlk, ++i) {
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dbgs() << "BB" << (*iterBlk)->getNumber();
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dbgs() << "(" << getSCCNum(*iterBlk) << "," << (*iterBlk)->size() << ")";
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if (i != 0 && i % 10 == 0) {
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dbgs() << "\n";
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} else {
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dbgs() << " ";
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}
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}
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}
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static void PrintLoopinfo(const MachineLoopInfo &LoopInfo) {
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for (MachineLoop::iterator iter = LoopInfo.begin(),
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iterEnd = LoopInfo.end(); iter != iterEnd; ++iter) {
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(*iter)->print(dbgs(), 0);
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}
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}
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// UTILITY FUNCTIONS
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int getSCCNum(MachineBasicBlock *MBB) const;
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MachineBasicBlock *getLoopLandInfo(MachineLoop *LoopRep) const;
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bool hasBackEdge(MachineBasicBlock *MBB) const;
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static unsigned getLoopDepth(MachineLoop *LoopRep);
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bool isRetiredBlock(MachineBasicBlock *MBB) const;
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bool isActiveLoophead(MachineBasicBlock *MBB) const;
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PathToKind singlePathTo(MachineBasicBlock *SrcMBB, MachineBasicBlock *DstMBB,
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bool AllowSideEntry = true) const;
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int countActiveBlock(MBBVector::const_iterator It,
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MBBVector::const_iterator E) const;
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bool needMigrateBlock(MachineBasicBlock *MBB) const;
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// Utility Functions
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void reversePredicateSetter(MachineBasicBlock::iterator I);
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/// Compute the reversed DFS post order of Blocks
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void orderBlocks(MachineFunction *MF);
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// Function originally from CFGStructTraits
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void insertInstrEnd(MachineBasicBlock *MBB, int NewOpcode,
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DebugLoc DL = DebugLoc());
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MachineInstr *insertInstrBefore(MachineBasicBlock *MBB, int NewOpcode,
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DebugLoc DL = DebugLoc());
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MachineInstr *insertInstrBefore(MachineBasicBlock::iterator I, int NewOpcode);
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void insertCondBranchBefore(MachineBasicBlock::iterator I, int NewOpcode,
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DebugLoc DL);
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void insertCondBranchBefore(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator I, int NewOpcode, int RegNum,
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DebugLoc DL);
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void insertCondBranchEnd(MachineBasicBlock *MBB, int NewOpcode, int RegNum);
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static int getBranchNzeroOpcode(int OldOpcode);
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static int getBranchZeroOpcode(int OldOpcode);
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static int getContinueNzeroOpcode(int OldOpcode);
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static int getContinueZeroOpcode(int OldOpcode);
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static MachineBasicBlock *getTrueBranch(MachineInstr *MI);
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static void setTrueBranch(MachineInstr *MI, MachineBasicBlock *MBB);
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static MachineBasicBlock *getFalseBranch(MachineBasicBlock *MBB,
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MachineInstr *MI);
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static bool isCondBranch(MachineInstr *MI);
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static bool isUncondBranch(MachineInstr *MI);
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static DebugLoc getLastDebugLocInBB(MachineBasicBlock *MBB);
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static MachineInstr *getNormalBlockBranchInstr(MachineBasicBlock *MBB);
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/// The correct naming for this is getPossibleLoopendBlockBranchInstr.
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///
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/// BB with backward-edge could have move instructions after the branch
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/// instruction. Such move instruction "belong to" the loop backward-edge.
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MachineInstr *getLoopendBlockBranchInstr(MachineBasicBlock *MBB);
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static MachineInstr *getReturnInstr(MachineBasicBlock *MBB);
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static MachineInstr *getContinueInstr(MachineBasicBlock *MBB);
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static bool isReturnBlock(MachineBasicBlock *MBB);
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static void cloneSuccessorList(MachineBasicBlock *DstMBB,
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MachineBasicBlock *SrcMBB) ;
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static MachineBasicBlock *clone(MachineBasicBlock *MBB);
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/// MachineBasicBlock::ReplaceUsesOfBlockWith doesn't serve the purpose
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/// because the AMDGPU instruction is not recognized as terminator fix this
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/// and retire this routine
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void replaceInstrUseOfBlockWith(MachineBasicBlock *SrcMBB,
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MachineBasicBlock *OldMBB, MachineBasicBlock *NewBlk);
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static void wrapup(MachineBasicBlock *MBB);
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int patternMatch(MachineBasicBlock *MBB);
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int patternMatchGroup(MachineBasicBlock *MBB);
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int serialPatternMatch(MachineBasicBlock *MBB);
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int ifPatternMatch(MachineBasicBlock *MBB);
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int loopendPatternMatch();
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int mergeLoop(MachineLoop *LoopRep);
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int loopcontPatternMatch(MachineLoop *LoopRep, MachineBasicBlock *LoopHeader);
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void handleLoopcontBlock(MachineBasicBlock *ContingMBB,
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MachineLoop *ContingLoop, MachineBasicBlock *ContMBB,
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MachineLoop *ContLoop);
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/// return true iff src1Blk->succ_size() == 0 && src1Blk and src2Blk are in
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/// the same loop with LoopLandInfo without explicitly keeping track of
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/// loopContBlks and loopBreakBlks, this is a method to get the information.
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bool isSameloopDetachedContbreak(MachineBasicBlock *Src1MBB,
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MachineBasicBlock *Src2MBB);
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int handleJumpintoIf(MachineBasicBlock *HeadMBB,
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MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB);
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int handleJumpintoIfImp(MachineBasicBlock *HeadMBB,
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MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB);
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int improveSimpleJumpintoIf(MachineBasicBlock *HeadMBB,
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MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB,
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MachineBasicBlock **LandMBBPtr);
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void showImproveSimpleJumpintoIf(MachineBasicBlock *HeadMBB,
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MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB,
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MachineBasicBlock *LandMBB, bool Detail = false);
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int cloneOnSideEntryTo(MachineBasicBlock *PreMBB,
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MachineBasicBlock *SrcMBB, MachineBasicBlock *DstMBB);
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void mergeSerialBlock(MachineBasicBlock *DstMBB,
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MachineBasicBlock *SrcMBB);
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void mergeIfthenelseBlock(MachineInstr *BranchMI,
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MachineBasicBlock *MBB, MachineBasicBlock *TrueMBB,
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MachineBasicBlock *FalseMBB, MachineBasicBlock *LandMBB);
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void mergeLooplandBlock(MachineBasicBlock *DstMBB,
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MachineBasicBlock *LandMBB);
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void mergeLoopbreakBlock(MachineBasicBlock *ExitingMBB,
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MachineBasicBlock *LandMBB);
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void settleLoopcontBlock(MachineBasicBlock *ContingMBB,
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MachineBasicBlock *ContMBB);
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/// normalizeInfiniteLoopExit change
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/// B1:
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/// uncond_br LoopHeader
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///
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/// to
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/// B1:
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/// cond_br 1 LoopHeader dummyExit
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/// and return the newly added dummy exit block
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MachineBasicBlock *normalizeInfiniteLoopExit(MachineLoop *LoopRep);
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void removeUnconditionalBranch(MachineBasicBlock *MBB);
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/// Remove duplicate branches instructions in a block.
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/// For instance
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/// B0:
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/// cond_br X B1 B2
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/// cond_br X B1 B2
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/// is transformed to
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/// B0:
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/// cond_br X B1 B2
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void removeRedundantConditionalBranch(MachineBasicBlock *MBB);
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void addDummyExitBlock(SmallVectorImpl<MachineBasicBlock *> &RetMBB);
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void removeSuccessor(MachineBasicBlock *MBB);
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MachineBasicBlock *cloneBlockForPredecessor(MachineBasicBlock *MBB,
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MachineBasicBlock *PredMBB);
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void migrateInstruction(MachineBasicBlock *SrcMBB,
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MachineBasicBlock *DstMBB, MachineBasicBlock::iterator I);
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void recordSccnum(MachineBasicBlock *MBB, int SCCNum);
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void retireBlock(MachineBasicBlock *MBB);
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void setLoopLandBlock(MachineLoop *LoopRep, MachineBasicBlock *MBB = NULL);
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MachineBasicBlock *findNearestCommonPostDom(std::set<MachineBasicBlock *>&);
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/// This is work around solution for findNearestCommonDominator not avaiable
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/// to post dom a proper fix should go to Dominators.h.
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MachineBasicBlock *findNearestCommonPostDom(MachineBasicBlock *MBB1,
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MachineBasicBlock *MBB2);
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private:
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MBBInfoMap BlockInfoMap;
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LoopLandInfoMap LLInfoMap;
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std::map<MachineLoop *, bool> Visited;
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MachineFunction *FuncRep;
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SmallVector<MachineBasicBlock *, DEFAULT_VEC_SLOTS> OrderedBlks;
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};
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int AMDGPUCFGStructurizer::getSCCNum(MachineBasicBlock *MBB) const {
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MBBInfoMap::const_iterator It = BlockInfoMap.find(MBB);
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if (It == BlockInfoMap.end())
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return INVALIDSCCNUM;
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return (*It).second->SccNum;
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}
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MachineBasicBlock *AMDGPUCFGStructurizer::getLoopLandInfo(MachineLoop *LoopRep)
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const {
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LoopLandInfoMap::const_iterator It = LLInfoMap.find(LoopRep);
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if (It == LLInfoMap.end())
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return NULL;
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return (*It).second;
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}
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bool AMDGPUCFGStructurizer::hasBackEdge(MachineBasicBlock *MBB) const {
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MachineLoop *LoopRep = MLI->getLoopFor(MBB);
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if (!LoopRep)
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return false;
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MachineBasicBlock *LoopHeader = LoopRep->getHeader();
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return MBB->isSuccessor(LoopHeader);
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}
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unsigned AMDGPUCFGStructurizer::getLoopDepth(MachineLoop *LoopRep) {
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return LoopRep ? LoopRep->getLoopDepth() : 0;
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}
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bool AMDGPUCFGStructurizer::isRetiredBlock(MachineBasicBlock *MBB) const {
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MBBInfoMap::const_iterator It = BlockInfoMap.find(MBB);
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if (It == BlockInfoMap.end())
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return false;
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return (*It).second->IsRetired;
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}
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bool AMDGPUCFGStructurizer::isActiveLoophead(MachineBasicBlock *MBB) const {
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MachineLoop *LoopRep = MLI->getLoopFor(MBB);
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while (LoopRep && LoopRep->getHeader() == MBB) {
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MachineBasicBlock *LoopLand = getLoopLandInfo(LoopRep);
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if(!LoopLand)
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return true;
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if (!isRetiredBlock(LoopLand))
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return true;
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LoopRep = LoopRep->getParentLoop();
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}
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return false;
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}
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AMDGPUCFGStructurizer::PathToKind AMDGPUCFGStructurizer::singlePathTo(
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MachineBasicBlock *SrcMBB, MachineBasicBlock *DstMBB,
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bool AllowSideEntry) const {
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assert(DstMBB);
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if (SrcMBB == DstMBB)
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return SinglePath_InPath;
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while (SrcMBB && SrcMBB->succ_size() == 1) {
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SrcMBB = *SrcMBB->succ_begin();
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if (SrcMBB == DstMBB)
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return SinglePath_InPath;
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if (!AllowSideEntry && SrcMBB->pred_size() > 1)
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return Not_SinglePath;
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}
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if (SrcMBB && SrcMBB->succ_size()==0)
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return SinglePath_NotInPath;
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return Not_SinglePath;
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}
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int AMDGPUCFGStructurizer::countActiveBlock(MBBVector::const_iterator It,
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MBBVector::const_iterator E) const {
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int Count = 0;
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while (It != E) {
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if (!isRetiredBlock(*It))
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++Count;
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++It;
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}
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return Count;
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}
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bool AMDGPUCFGStructurizer::needMigrateBlock(MachineBasicBlock *MBB) const {
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unsigned BlockSizeThreshold = 30;
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unsigned CloneInstrThreshold = 100;
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bool MultiplePreds = MBB && (MBB->pred_size() > 1);
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if(!MultiplePreds)
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return false;
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unsigned BlkSize = MBB->size();
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return ((BlkSize > BlockSizeThreshold) &&
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(BlkSize * (MBB->pred_size() - 1) > CloneInstrThreshold));
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}
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void AMDGPUCFGStructurizer::reversePredicateSetter(
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MachineBasicBlock::iterator I) {
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while (I--) {
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if (I->getOpcode() == AMDGPU::PRED_X) {
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switch (static_cast<MachineInstr *>(I)->getOperand(2).getImm()) {
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case OPCODE_IS_ZERO_INT:
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static_cast<MachineInstr *>(I)->getOperand(2)
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.setImm(OPCODE_IS_NOT_ZERO_INT);
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return;
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case OPCODE_IS_NOT_ZERO_INT:
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static_cast<MachineInstr *>(I)->getOperand(2)
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.setImm(OPCODE_IS_ZERO_INT);
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return;
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case OPCODE_IS_ZERO:
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static_cast<MachineInstr *>(I)->getOperand(2)
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.setImm(OPCODE_IS_NOT_ZERO);
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return;
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case OPCODE_IS_NOT_ZERO:
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static_cast<MachineInstr *>(I)->getOperand(2)
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.setImm(OPCODE_IS_ZERO);
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return;
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default:
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llvm_unreachable("PRED_X Opcode invalid!");
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}
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}
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}
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}
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void AMDGPUCFGStructurizer::insertInstrEnd(MachineBasicBlock *MBB,
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int NewOpcode, DebugLoc DL) {
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MachineInstr *MI = MBB->getParent()
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->CreateMachineInstr(TII->get(NewOpcode), DL);
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MBB->push_back(MI);
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//assume the instruction doesn't take any reg operand ...
|
|
SHOWNEWINSTR(MI);
|
|
}
|
|
|
|
MachineInstr *AMDGPUCFGStructurizer::insertInstrBefore(MachineBasicBlock *MBB,
|
|
int NewOpcode, DebugLoc DL) {
|
|
MachineInstr *MI =
|
|
MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DL);
|
|
if (MBB->begin() != MBB->end())
|
|
MBB->insert(MBB->begin(), MI);
|
|
else
|
|
MBB->push_back(MI);
|
|
SHOWNEWINSTR(MI);
|
|
return MI;
|
|
}
|
|
|
|
MachineInstr *AMDGPUCFGStructurizer::insertInstrBefore(
|
|
MachineBasicBlock::iterator I, int NewOpcode) {
|
|
MachineInstr *OldMI = &(*I);
|
|
MachineBasicBlock *MBB = OldMI->getParent();
|
|
MachineInstr *NewMBB =
|
|
MBB->getParent()->CreateMachineInstr(TII->get(NewOpcode), DebugLoc());
|
|
MBB->insert(I, NewMBB);
|
|
//assume the instruction doesn't take any reg operand ...
|
|
SHOWNEWINSTR(NewMBB);
|
|
return NewMBB;
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::insertCondBranchBefore(
|
|
MachineBasicBlock::iterator I, int NewOpcode, DebugLoc DL) {
|
|
MachineInstr *OldMI = &(*I);
|
|
MachineBasicBlock *MBB = OldMI->getParent();
|
|
MachineFunction *MF = MBB->getParent();
|
|
MachineInstr *NewMI = MF->CreateMachineInstr(TII->get(NewOpcode), DL);
|
|
MBB->insert(I, NewMI);
|
|
MachineInstrBuilder MIB(*MF, NewMI);
|
|
MIB.addReg(OldMI->getOperand(1).getReg(), false);
|
|
SHOWNEWINSTR(NewMI);
|
|
//erase later oldInstr->eraseFromParent();
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::insertCondBranchBefore(MachineBasicBlock *blk,
|
|
MachineBasicBlock::iterator I, int NewOpcode, int RegNum,
|
|
DebugLoc DL) {
|
|
MachineFunction *MF = blk->getParent();
|
|
MachineInstr *NewInstr = MF->CreateMachineInstr(TII->get(NewOpcode), DL);
|
|
//insert before
|
|
blk->insert(I, NewInstr);
|
|
MachineInstrBuilder(*MF, NewInstr).addReg(RegNum, false);
|
|
SHOWNEWINSTR(NewInstr);
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::insertCondBranchEnd(MachineBasicBlock *MBB,
|
|
int NewOpcode, int RegNum) {
|
|
MachineFunction *MF = MBB->getParent();
|
|
MachineInstr *NewInstr =
|
|
MF->CreateMachineInstr(TII->get(NewOpcode), DebugLoc());
|
|
MBB->push_back(NewInstr);
|
|
MachineInstrBuilder(*MF, NewInstr).addReg(RegNum, false);
|
|
SHOWNEWINSTR(NewInstr);
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::getBranchNzeroOpcode(int OldOpcode) {
|
|
switch(OldOpcode) {
|
|
case AMDGPU::JUMP_COND:
|
|
case AMDGPU::JUMP: return AMDGPU::IF_PREDICATE_SET;
|
|
case AMDGPU::BRANCH_COND_i32:
|
|
case AMDGPU::BRANCH_COND_f32: return AMDGPU::IF_LOGICALNZ_f32;
|
|
default: llvm_unreachable("internal error");
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::getBranchZeroOpcode(int OldOpcode) {
|
|
switch(OldOpcode) {
|
|
case AMDGPU::JUMP_COND:
|
|
case AMDGPU::JUMP: return AMDGPU::IF_PREDICATE_SET;
|
|
case AMDGPU::BRANCH_COND_i32:
|
|
case AMDGPU::BRANCH_COND_f32: return AMDGPU::IF_LOGICALZ_f32;
|
|
default: llvm_unreachable("internal error");
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::getContinueNzeroOpcode(int OldOpcode) {
|
|
switch(OldOpcode) {
|
|
case AMDGPU::JUMP_COND:
|
|
case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALNZ_i32;
|
|
default: llvm_unreachable("internal error");
|
|
};
|
|
return -1;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::getContinueZeroOpcode(int OldOpcode) {
|
|
switch(OldOpcode) {
|
|
case AMDGPU::JUMP_COND:
|
|
case AMDGPU::JUMP: return AMDGPU::CONTINUE_LOGICALZ_i32;
|
|
default: llvm_unreachable("internal error");
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
MachineBasicBlock *AMDGPUCFGStructurizer::getTrueBranch(MachineInstr *MI) {
|
|
return MI->getOperand(0).getMBB();
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::setTrueBranch(MachineInstr *MI,
|
|
MachineBasicBlock *MBB) {
|
|
MI->getOperand(0).setMBB(MBB);
|
|
}
|
|
|
|
MachineBasicBlock *
|
|
AMDGPUCFGStructurizer::getFalseBranch(MachineBasicBlock *MBB,
|
|
MachineInstr *MI) {
|
|
assert(MBB->succ_size() == 2);
|
|
MachineBasicBlock *TrueBranch = getTrueBranch(MI);
|
|
MachineBasicBlock::succ_iterator It = MBB->succ_begin();
|
|
MachineBasicBlock::succ_iterator Next = It;
|
|
++Next;
|
|
return (*It == TrueBranch) ? *Next : *It;
|
|
}
|
|
|
|
bool AMDGPUCFGStructurizer::isCondBranch(MachineInstr *MI) {
|
|
switch (MI->getOpcode()) {
|
|
case AMDGPU::JUMP_COND:
|
|
case AMDGPU::BRANCH_COND_i32:
|
|
case AMDGPU::BRANCH_COND_f32: return true;
|
|
default:
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
bool AMDGPUCFGStructurizer::isUncondBranch(MachineInstr *MI) {
|
|
switch (MI->getOpcode()) {
|
|
case AMDGPU::JUMP:
|
|
case AMDGPU::BRANCH:
|
|
return true;
|
|
default:
|
|
return false;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
DebugLoc AMDGPUCFGStructurizer::getLastDebugLocInBB(MachineBasicBlock *MBB) {
|
|
//get DebugLoc from the first MachineBasicBlock instruction with debug info
|
|
DebugLoc DL;
|
|
for (MachineBasicBlock::iterator It = MBB->begin(); It != MBB->end();
|
|
++It) {
|
|
MachineInstr *instr = &(*It);
|
|
if (instr->getDebugLoc().isUnknown() == false)
|
|
DL = instr->getDebugLoc();
|
|
}
|
|
return DL;
|
|
}
|
|
|
|
MachineInstr *AMDGPUCFGStructurizer::getNormalBlockBranchInstr(
|
|
MachineBasicBlock *MBB) {
|
|
MachineBasicBlock::reverse_iterator It = MBB->rbegin();
|
|
MachineInstr *MI = &*It;
|
|
if (MI && (isCondBranch(MI) || isUncondBranch(MI)))
|
|
return MI;
|
|
return NULL;
|
|
}
|
|
|
|
MachineInstr *AMDGPUCFGStructurizer::getLoopendBlockBranchInstr(
|
|
MachineBasicBlock *MBB) {
|
|
for (MachineBasicBlock::reverse_iterator It = MBB->rbegin(), E = MBB->rend();
|
|
It != E; ++It) {
|
|
// FIXME: Simplify
|
|
MachineInstr *MI = &*It;
|
|
if (MI) {
|
|
if (isCondBranch(MI) || isUncondBranch(MI))
|
|
return MI;
|
|
else if (!TII->isMov(MI->getOpcode()))
|
|
break;
|
|
}
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
MachineInstr *AMDGPUCFGStructurizer::getReturnInstr(MachineBasicBlock *MBB) {
|
|
MachineBasicBlock::reverse_iterator It = MBB->rbegin();
|
|
if (It != MBB->rend()) {
|
|
MachineInstr *instr = &(*It);
|
|
if (instr->getOpcode() == AMDGPU::RETURN)
|
|
return instr;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
MachineInstr *AMDGPUCFGStructurizer::getContinueInstr(MachineBasicBlock *MBB) {
|
|
MachineBasicBlock::reverse_iterator It = MBB->rbegin();
|
|
if (It != MBB->rend()) {
|
|
MachineInstr *MI = &(*It);
|
|
if (MI->getOpcode() == AMDGPU::CONTINUE)
|
|
return MI;
|
|
}
|
|
return NULL;
|
|
}
|
|
|
|
bool AMDGPUCFGStructurizer::isReturnBlock(MachineBasicBlock *MBB) {
|
|
MachineInstr *MI = getReturnInstr(MBB);
|
|
bool IsReturn = (MBB->succ_size() == 0);
|
|
if (MI)
|
|
assert(IsReturn);
|
|
else if (IsReturn)
|
|
DEBUG(
|
|
dbgs() << "BB" << MBB->getNumber()
|
|
<<" is return block without RETURN instr\n";);
|
|
return IsReturn;
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::cloneSuccessorList(MachineBasicBlock *DstMBB,
|
|
MachineBasicBlock *SrcMBB) {
|
|
for (MachineBasicBlock::succ_iterator It = SrcMBB->succ_begin(),
|
|
iterEnd = SrcMBB->succ_end(); It != iterEnd; ++It)
|
|
DstMBB->addSuccessor(*It); // *iter's predecessor is also taken care of
|
|
}
|
|
|
|
MachineBasicBlock *AMDGPUCFGStructurizer::clone(MachineBasicBlock *MBB) {
|
|
MachineFunction *Func = MBB->getParent();
|
|
MachineBasicBlock *NewMBB = Func->CreateMachineBasicBlock();
|
|
Func->push_back(NewMBB); //insert to function
|
|
for (MachineBasicBlock::iterator It = MBB->begin(), E = MBB->end();
|
|
It != E; ++It) {
|
|
MachineInstr *MI = Func->CloneMachineInstr(It);
|
|
NewMBB->push_back(MI);
|
|
}
|
|
return NewMBB;
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::replaceInstrUseOfBlockWith(
|
|
MachineBasicBlock *SrcMBB, MachineBasicBlock *OldMBB,
|
|
MachineBasicBlock *NewBlk) {
|
|
MachineInstr *BranchMI = getLoopendBlockBranchInstr(SrcMBB);
|
|
if (BranchMI && isCondBranch(BranchMI) &&
|
|
getTrueBranch(BranchMI) == OldMBB)
|
|
setTrueBranch(BranchMI, NewBlk);
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::wrapup(MachineBasicBlock *MBB) {
|
|
assert((!MBB->getParent()->getJumpTableInfo()
|
|
|| MBB->getParent()->getJumpTableInfo()->isEmpty())
|
|
&& "found a jump table");
|
|
|
|
//collect continue right before endloop
|
|
SmallVector<MachineInstr *, DEFAULT_VEC_SLOTS> ContInstr;
|
|
MachineBasicBlock::iterator Pre = MBB->begin();
|
|
MachineBasicBlock::iterator E = MBB->end();
|
|
MachineBasicBlock::iterator It = Pre;
|
|
while (It != E) {
|
|
if (Pre->getOpcode() == AMDGPU::CONTINUE
|
|
&& It->getOpcode() == AMDGPU::ENDLOOP)
|
|
ContInstr.push_back(Pre);
|
|
Pre = It;
|
|
++It;
|
|
}
|
|
|
|
//delete continue right before endloop
|
|
for (unsigned i = 0; i < ContInstr.size(); ++i)
|
|
ContInstr[i]->eraseFromParent();
|
|
|
|
// TODO to fix up jump table so later phase won't be confused. if
|
|
// (jumpTableInfo->isEmpty() == false) { need to clean the jump table, but
|
|
// there isn't such an interface yet. alternatively, replace all the other
|
|
// blocks in the jump table with the entryBlk //}
|
|
|
|
}
|
|
|
|
|
|
bool AMDGPUCFGStructurizer::prepare() {
|
|
bool Changed = false;
|
|
|
|
//FIXME: if not reducible flow graph, make it so ???
|
|
|
|
DEBUG(dbgs() << "AMDGPUCFGStructurizer::prepare\n";);
|
|
|
|
orderBlocks(FuncRep);
|
|
|
|
SmallVector<MachineBasicBlock *, DEFAULT_VEC_SLOTS> RetBlks;
|
|
|
|
// Add an ExitBlk to loop that don't have one
|
|
for (MachineLoopInfo::iterator It = MLI->begin(),
|
|
E = MLI->end(); It != E; ++It) {
|
|
MachineLoop *LoopRep = (*It);
|
|
MBBVector ExitingMBBs;
|
|
LoopRep->getExitingBlocks(ExitingMBBs);
|
|
|
|
if (ExitingMBBs.size() == 0) {
|
|
MachineBasicBlock* DummyExitBlk = normalizeInfiniteLoopExit(LoopRep);
|
|
if (DummyExitBlk)
|
|
RetBlks.push_back(DummyExitBlk);
|
|
}
|
|
}
|
|
|
|
// Remove unconditional branch instr.
|
|
// Add dummy exit block iff there are multiple returns.
|
|
for (SmallVectorImpl<MachineBasicBlock *>::const_iterator
|
|
It = OrderedBlks.begin(), E = OrderedBlks.end(); It != E; ++It) {
|
|
MachineBasicBlock *MBB = *It;
|
|
removeUnconditionalBranch(MBB);
|
|
removeRedundantConditionalBranch(MBB);
|
|
if (isReturnBlock(MBB)) {
|
|
RetBlks.push_back(MBB);
|
|
}
|
|
assert(MBB->succ_size() <= 2);
|
|
}
|
|
|
|
if (RetBlks.size() >= 2) {
|
|
addDummyExitBlock(RetBlks);
|
|
Changed = true;
|
|
}
|
|
|
|
return Changed;
|
|
}
|
|
|
|
bool AMDGPUCFGStructurizer::run() {
|
|
|
|
//Assume reducible CFG...
|
|
DEBUG(dbgs() << "AMDGPUCFGStructurizer::run\n");
|
|
|
|
#ifdef STRESSTEST
|
|
//Use the worse block ordering to test the algorithm.
|
|
ReverseVector(orderedBlks);
|
|
#endif
|
|
|
|
DEBUG(dbgs() << "Ordered blocks:\n"; printOrderedBlocks(););
|
|
int NumIter = 0;
|
|
bool Finish = false;
|
|
MachineBasicBlock *MBB;
|
|
bool MakeProgress = false;
|
|
int NumRemainedBlk = countActiveBlock(OrderedBlks.begin(),
|
|
OrderedBlks.end());
|
|
|
|
do {
|
|
++NumIter;
|
|
DEBUG(
|
|
dbgs() << "numIter = " << NumIter
|
|
<< ", numRemaintedBlk = " << NumRemainedBlk << "\n";
|
|
);
|
|
|
|
SmallVectorImpl<MachineBasicBlock *>::const_iterator It =
|
|
OrderedBlks.begin();
|
|
SmallVectorImpl<MachineBasicBlock *>::const_iterator E =
|
|
OrderedBlks.end();
|
|
|
|
SmallVectorImpl<MachineBasicBlock *>::const_iterator SccBeginIter =
|
|
It;
|
|
MachineBasicBlock *SccBeginMBB = NULL;
|
|
int SccNumBlk = 0; // The number of active blocks, init to a
|
|
// maximum possible number.
|
|
int SccNumIter; // Number of iteration in this SCC.
|
|
|
|
while (It != E) {
|
|
MBB = *It;
|
|
|
|
if (!SccBeginMBB) {
|
|
SccBeginIter = It;
|
|
SccBeginMBB = MBB;
|
|
SccNumIter = 0;
|
|
SccNumBlk = NumRemainedBlk; // Init to maximum possible number.
|
|
DEBUG(
|
|
dbgs() << "start processing SCC" << getSCCNum(SccBeginMBB);
|
|
dbgs() << "\n";
|
|
);
|
|
}
|
|
|
|
if (!isRetiredBlock(MBB))
|
|
patternMatch(MBB);
|
|
|
|
++It;
|
|
|
|
bool ContNextScc = true;
|
|
if (It == E
|
|
|| getSCCNum(SccBeginMBB) != getSCCNum(*It)) {
|
|
// Just finish one scc.
|
|
++SccNumIter;
|
|
int sccRemainedNumBlk = countActiveBlock(SccBeginIter, It);
|
|
if (sccRemainedNumBlk != 1 && sccRemainedNumBlk >= SccNumBlk) {
|
|
DEBUG(
|
|
dbgs() << "Can't reduce SCC " << getSCCNum(MBB)
|
|
<< ", sccNumIter = " << SccNumIter;
|
|
dbgs() << "doesn't make any progress\n";
|
|
);
|
|
ContNextScc = true;
|
|
} else if (sccRemainedNumBlk != 1 && sccRemainedNumBlk < SccNumBlk) {
|
|
SccNumBlk = sccRemainedNumBlk;
|
|
It = SccBeginIter;
|
|
ContNextScc = false;
|
|
DEBUG(
|
|
dbgs() << "repeat processing SCC" << getSCCNum(MBB)
|
|
<< "sccNumIter = " << SccNumIter << '\n';
|
|
);
|
|
} else {
|
|
// Finish the current scc.
|
|
ContNextScc = true;
|
|
}
|
|
} else {
|
|
// Continue on next component in the current scc.
|
|
ContNextScc = false;
|
|
}
|
|
|
|
if (ContNextScc)
|
|
SccBeginMBB = NULL;
|
|
} //while, "one iteration" over the function.
|
|
|
|
MachineBasicBlock *EntryMBB =
|
|
GraphTraits<MachineFunction *>::nodes_begin(FuncRep);
|
|
if (EntryMBB->succ_size() == 0) {
|
|
Finish = true;
|
|
DEBUG(
|
|
dbgs() << "Reduce to one block\n";
|
|
);
|
|
} else {
|
|
int NewnumRemainedBlk
|
|
= countActiveBlock(OrderedBlks.begin(), OrderedBlks.end());
|
|
// consider cloned blocks ??
|
|
if (NewnumRemainedBlk == 1 || NewnumRemainedBlk < NumRemainedBlk) {
|
|
MakeProgress = true;
|
|
NumRemainedBlk = NewnumRemainedBlk;
|
|
} else {
|
|
MakeProgress = false;
|
|
DEBUG(
|
|
dbgs() << "No progress\n";
|
|
);
|
|
}
|
|
}
|
|
} while (!Finish && MakeProgress);
|
|
|
|
// Misc wrap up to maintain the consistency of the Function representation.
|
|
wrapup(GraphTraits<MachineFunction *>::nodes_begin(FuncRep));
|
|
|
|
// Detach retired Block, release memory.
|
|
for (MBBInfoMap::iterator It = BlockInfoMap.begin(), E = BlockInfoMap.end();
|
|
It != E; ++It) {
|
|
if ((*It).second && (*It).second->IsRetired) {
|
|
assert(((*It).first)->getNumber() != -1);
|
|
DEBUG(
|
|
dbgs() << "Erase BB" << ((*It).first)->getNumber() << "\n";
|
|
);
|
|
(*It).first->eraseFromParent(); //Remove from the parent Function.
|
|
}
|
|
delete (*It).second;
|
|
}
|
|
BlockInfoMap.clear();
|
|
LLInfoMap.clear();
|
|
|
|
if (!Finish) {
|
|
DEBUG(FuncRep->viewCFG());
|
|
llvm_unreachable("IRREDUCIBLE_CFG");
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
|
|
|
|
void AMDGPUCFGStructurizer::orderBlocks(MachineFunction *MF) {
|
|
int SccNum = 0;
|
|
MachineBasicBlock *MBB;
|
|
for (scc_iterator<MachineFunction *> It = scc_begin(MF); !It.isAtEnd();
|
|
++It, ++SccNum) {
|
|
std::vector<MachineBasicBlock *> &SccNext = *It;
|
|
for (std::vector<MachineBasicBlock *>::const_iterator
|
|
blockIter = SccNext.begin(), blockEnd = SccNext.end();
|
|
blockIter != blockEnd; ++blockIter) {
|
|
MBB = *blockIter;
|
|
OrderedBlks.push_back(MBB);
|
|
recordSccnum(MBB, SccNum);
|
|
}
|
|
}
|
|
|
|
//walk through all the block in func to check for unreachable
|
|
typedef GraphTraits<MachineFunction *> GTM;
|
|
MachineFunction::iterator It = GTM::nodes_begin(MF), E = GTM::nodes_end(MF);
|
|
for (; It != E; ++It) {
|
|
MachineBasicBlock *MBB = &(*It);
|
|
SccNum = getSCCNum(MBB);
|
|
if (SccNum == INVALIDSCCNUM)
|
|
dbgs() << "unreachable block BB" << MBB->getNumber() << "\n";
|
|
}
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::patternMatch(MachineBasicBlock *MBB) {
|
|
int NumMatch = 0;
|
|
int CurMatch;
|
|
|
|
DEBUG(
|
|
dbgs() << "Begin patternMatch BB" << MBB->getNumber() << "\n";
|
|
);
|
|
|
|
while ((CurMatch = patternMatchGroup(MBB)) > 0)
|
|
NumMatch += CurMatch;
|
|
|
|
DEBUG(
|
|
dbgs() << "End patternMatch BB" << MBB->getNumber()
|
|
<< ", numMatch = " << NumMatch << "\n";
|
|
);
|
|
|
|
return NumMatch;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::patternMatchGroup(MachineBasicBlock *MBB) {
|
|
int NumMatch = 0;
|
|
NumMatch += loopendPatternMatch();
|
|
NumMatch += serialPatternMatch(MBB);
|
|
NumMatch += ifPatternMatch(MBB);
|
|
return NumMatch;
|
|
}
|
|
|
|
|
|
int AMDGPUCFGStructurizer::serialPatternMatch(MachineBasicBlock *MBB) {
|
|
if (MBB->succ_size() != 1)
|
|
return 0;
|
|
|
|
MachineBasicBlock *childBlk = *MBB->succ_begin();
|
|
if (childBlk->pred_size() != 1 || isActiveLoophead(childBlk))
|
|
return 0;
|
|
|
|
mergeSerialBlock(MBB, childBlk);
|
|
++numSerialPatternMatch;
|
|
return 1;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::ifPatternMatch(MachineBasicBlock *MBB) {
|
|
//two edges
|
|
if (MBB->succ_size() != 2)
|
|
return 0;
|
|
if (hasBackEdge(MBB))
|
|
return 0;
|
|
MachineInstr *BranchMI = getNormalBlockBranchInstr(MBB);
|
|
if (!BranchMI)
|
|
return 0;
|
|
|
|
assert(isCondBranch(BranchMI));
|
|
int NumMatch = 0;
|
|
|
|
MachineBasicBlock *TrueMBB = getTrueBranch(BranchMI);
|
|
NumMatch += serialPatternMatch(TrueMBB);
|
|
NumMatch += ifPatternMatch(TrueMBB);
|
|
MachineBasicBlock *FalseMBB = getFalseBranch(MBB, BranchMI);
|
|
NumMatch += serialPatternMatch(FalseMBB);
|
|
NumMatch += ifPatternMatch(FalseMBB);
|
|
MachineBasicBlock *LandBlk;
|
|
int Cloned = 0;
|
|
|
|
assert (!TrueMBB->succ_empty() || !FalseMBB->succ_empty());
|
|
// TODO: Simplify
|
|
if (TrueMBB->succ_size() == 1 && FalseMBB->succ_size() == 1
|
|
&& *TrueMBB->succ_begin() == *FalseMBB->succ_begin()) {
|
|
// Diamond pattern
|
|
LandBlk = *TrueMBB->succ_begin();
|
|
} else if (TrueMBB->succ_size() == 1 && *TrueMBB->succ_begin() == FalseMBB) {
|
|
// Triangle pattern, false is empty
|
|
LandBlk = FalseMBB;
|
|
FalseMBB = NULL;
|
|
} else if (FalseMBB->succ_size() == 1
|
|
&& *FalseMBB->succ_begin() == TrueMBB) {
|
|
// Triangle pattern, true is empty
|
|
// We reverse the predicate to make a triangle, empty false pattern;
|
|
std::swap(TrueMBB, FalseMBB);
|
|
reversePredicateSetter(MBB->end());
|
|
LandBlk = FalseMBB;
|
|
FalseMBB = NULL;
|
|
} else if (FalseMBB->succ_size() == 1
|
|
&& isSameloopDetachedContbreak(TrueMBB, FalseMBB)) {
|
|
LandBlk = *FalseMBB->succ_begin();
|
|
} else if (TrueMBB->succ_size() == 1
|
|
&& isSameloopDetachedContbreak(FalseMBB, TrueMBB)) {
|
|
LandBlk = *TrueMBB->succ_begin();
|
|
} else {
|
|
return NumMatch + handleJumpintoIf(MBB, TrueMBB, FalseMBB);
|
|
}
|
|
|
|
// improveSimpleJumpinfoIf can handle the case where landBlk == NULL but the
|
|
// new BB created for landBlk==NULL may introduce new challenge to the
|
|
// reduction process.
|
|
if (LandBlk &&
|
|
((TrueMBB && TrueMBB->pred_size() > 1)
|
|
|| (FalseMBB && FalseMBB->pred_size() > 1))) {
|
|
Cloned += improveSimpleJumpintoIf(MBB, TrueMBB, FalseMBB, &LandBlk);
|
|
}
|
|
|
|
if (TrueMBB && TrueMBB->pred_size() > 1) {
|
|
TrueMBB = cloneBlockForPredecessor(TrueMBB, MBB);
|
|
++Cloned;
|
|
}
|
|
|
|
if (FalseMBB && FalseMBB->pred_size() > 1) {
|
|
FalseMBB = cloneBlockForPredecessor(FalseMBB, MBB);
|
|
++Cloned;
|
|
}
|
|
|
|
mergeIfthenelseBlock(BranchMI, MBB, TrueMBB, FalseMBB, LandBlk);
|
|
|
|
++numIfPatternMatch;
|
|
|
|
numClonedBlock += Cloned;
|
|
|
|
return 1 + Cloned + NumMatch;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::loopendPatternMatch() {
|
|
std::vector<MachineLoop *> NestedLoops;
|
|
for (MachineLoopInfo::iterator It = MLI->begin(), E = MLI->end();
|
|
It != E; ++It) {
|
|
df_iterator<MachineLoop *> LpIt = df_begin(*It),
|
|
LpE = df_end(*It);
|
|
for (; LpIt != LpE; ++LpIt)
|
|
NestedLoops.push_back(*LpIt);
|
|
}
|
|
if (NestedLoops.size() == 0)
|
|
return 0;
|
|
|
|
// Process nested loop outside->inside, so "continue" to a outside loop won't
|
|
// be mistaken as "break" of the current loop.
|
|
int Num = 0;
|
|
for (std::vector<MachineLoop *>::reverse_iterator It = NestedLoops.rbegin(),
|
|
E = NestedLoops.rend(); It != E; ++It) {
|
|
MachineLoop *ExaminedLoop = *It;
|
|
if (ExaminedLoop->getNumBlocks() == 0 || Visited[ExaminedLoop])
|
|
continue;
|
|
DEBUG(dbgs() << "Processing:\n"; ExaminedLoop->dump(););
|
|
int NumBreak = mergeLoop(ExaminedLoop);
|
|
if (NumBreak == -1)
|
|
break;
|
|
Num += NumBreak;
|
|
}
|
|
return Num;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::mergeLoop(MachineLoop *LoopRep) {
|
|
MachineBasicBlock *LoopHeader = LoopRep->getHeader();
|
|
MBBVector ExitingMBBs;
|
|
LoopRep->getExitingBlocks(ExitingMBBs);
|
|
assert(!ExitingMBBs.empty() && "Infinite Loop not supported");
|
|
DEBUG(dbgs() << "Loop has " << ExitingMBBs.size() << " exiting blocks\n";);
|
|
// We assume a single ExitBlk
|
|
MBBVector ExitBlks;
|
|
LoopRep->getExitBlocks(ExitBlks);
|
|
SmallPtrSet<MachineBasicBlock *, 2> ExitBlkSet;
|
|
for (unsigned i = 0, e = ExitBlks.size(); i < e; ++i)
|
|
ExitBlkSet.insert(ExitBlks[i]);
|
|
assert(ExitBlkSet.size() == 1);
|
|
MachineBasicBlock *ExitBlk = *ExitBlks.begin();
|
|
assert(ExitBlk && "Loop has several exit block");
|
|
MBBVector LatchBlks;
|
|
typedef GraphTraits<Inverse<MachineBasicBlock*> > InvMBBTraits;
|
|
InvMBBTraits::ChildIteratorType PI = InvMBBTraits::child_begin(LoopHeader),
|
|
PE = InvMBBTraits::child_end(LoopHeader);
|
|
for (; PI != PE; PI++) {
|
|
if (LoopRep->contains(*PI))
|
|
LatchBlks.push_back(*PI);
|
|
}
|
|
|
|
for (unsigned i = 0, e = ExitingMBBs.size(); i < e; ++i)
|
|
mergeLoopbreakBlock(ExitingMBBs[i], ExitBlk);
|
|
for (unsigned i = 0, e = LatchBlks.size(); i < e; ++i)
|
|
settleLoopcontBlock(LatchBlks[i], LoopHeader);
|
|
int Match = 0;
|
|
do {
|
|
Match = 0;
|
|
Match += serialPatternMatch(LoopHeader);
|
|
Match += ifPatternMatch(LoopHeader);
|
|
} while (Match > 0);
|
|
mergeLooplandBlock(LoopHeader, ExitBlk);
|
|
MachineLoop *ParentLoop = LoopRep->getParentLoop();
|
|
if (ParentLoop)
|
|
MLI->changeLoopFor(LoopHeader, ParentLoop);
|
|
else
|
|
MLI->removeBlock(LoopHeader);
|
|
Visited[LoopRep] = true;
|
|
return 1;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::loopcontPatternMatch(MachineLoop *LoopRep,
|
|
MachineBasicBlock *LoopHeader) {
|
|
int NumCont = 0;
|
|
SmallVector<MachineBasicBlock *, DEFAULT_VEC_SLOTS> ContMBB;
|
|
typedef GraphTraits<Inverse<MachineBasicBlock *> > GTIM;
|
|
GTIM::ChildIteratorType It = GTIM::child_begin(LoopHeader),
|
|
E = GTIM::child_end(LoopHeader);
|
|
for (; It != E; ++It) {
|
|
MachineBasicBlock *MBB = *It;
|
|
if (LoopRep->contains(MBB)) {
|
|
handleLoopcontBlock(MBB, MLI->getLoopFor(MBB),
|
|
LoopHeader, LoopRep);
|
|
ContMBB.push_back(MBB);
|
|
++NumCont;
|
|
}
|
|
}
|
|
|
|
for (SmallVectorImpl<MachineBasicBlock *>::iterator It = ContMBB.begin(),
|
|
E = ContMBB.end(); It != E; ++It) {
|
|
(*It)->removeSuccessor(LoopHeader);
|
|
}
|
|
|
|
numLoopcontPatternMatch += NumCont;
|
|
|
|
return NumCont;
|
|
}
|
|
|
|
|
|
bool AMDGPUCFGStructurizer::isSameloopDetachedContbreak(
|
|
MachineBasicBlock *Src1MBB, MachineBasicBlock *Src2MBB) {
|
|
if (Src1MBB->succ_size() == 0) {
|
|
MachineLoop *LoopRep = MLI->getLoopFor(Src1MBB);
|
|
if (LoopRep&& LoopRep == MLI->getLoopFor(Src2MBB)) {
|
|
MachineBasicBlock *&TheEntry = LLInfoMap[LoopRep];
|
|
if (TheEntry) {
|
|
DEBUG(
|
|
dbgs() << "isLoopContBreakBlock yes src1 = BB"
|
|
<< Src1MBB->getNumber()
|
|
<< " src2 = BB" << Src2MBB->getNumber() << "\n";
|
|
);
|
|
return true;
|
|
}
|
|
}
|
|
}
|
|
return false;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::handleJumpintoIf(MachineBasicBlock *HeadMBB,
|
|
MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB) {
|
|
int Num = handleJumpintoIfImp(HeadMBB, TrueMBB, FalseMBB);
|
|
if (Num == 0) {
|
|
DEBUG(
|
|
dbgs() << "handleJumpintoIf swap trueBlk and FalseBlk" << "\n";
|
|
);
|
|
Num = handleJumpintoIfImp(HeadMBB, FalseMBB, TrueMBB);
|
|
}
|
|
return Num;
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::handleJumpintoIfImp(MachineBasicBlock *HeadMBB,
|
|
MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB) {
|
|
int Num = 0;
|
|
MachineBasicBlock *DownBlk;
|
|
|
|
//trueBlk could be the common post dominator
|
|
DownBlk = TrueMBB;
|
|
|
|
DEBUG(
|
|
dbgs() << "handleJumpintoIfImp head = BB" << HeadMBB->getNumber()
|
|
<< " true = BB" << TrueMBB->getNumber()
|
|
<< ", numSucc=" << TrueMBB->succ_size()
|
|
<< " false = BB" << FalseMBB->getNumber() << "\n";
|
|
);
|
|
|
|
while (DownBlk) {
|
|
DEBUG(
|
|
dbgs() << "check down = BB" << DownBlk->getNumber();
|
|
);
|
|
|
|
if (singlePathTo(FalseMBB, DownBlk) == SinglePath_InPath) {
|
|
DEBUG(
|
|
dbgs() << " working\n";
|
|
);
|
|
|
|
Num += cloneOnSideEntryTo(HeadMBB, TrueMBB, DownBlk);
|
|
Num += cloneOnSideEntryTo(HeadMBB, FalseMBB, DownBlk);
|
|
|
|
numClonedBlock += Num;
|
|
Num += serialPatternMatch(*HeadMBB->succ_begin());
|
|
Num += serialPatternMatch(*std::next(HeadMBB->succ_begin()));
|
|
Num += ifPatternMatch(HeadMBB);
|
|
assert(Num > 0);
|
|
|
|
break;
|
|
}
|
|
DEBUG(
|
|
dbgs() << " not working\n";
|
|
);
|
|
DownBlk = (DownBlk->succ_size() == 1) ? (*DownBlk->succ_begin()) : NULL;
|
|
} // walk down the postDomTree
|
|
|
|
return Num;
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::showImproveSimpleJumpintoIf(
|
|
MachineBasicBlock *HeadMBB, MachineBasicBlock *TrueMBB,
|
|
MachineBasicBlock *FalseMBB, MachineBasicBlock *LandMBB, bool Detail) {
|
|
dbgs() << "head = BB" << HeadMBB->getNumber()
|
|
<< " size = " << HeadMBB->size();
|
|
if (Detail) {
|
|
dbgs() << "\n";
|
|
HeadMBB->print(dbgs());
|
|
dbgs() << "\n";
|
|
}
|
|
|
|
if (TrueMBB) {
|
|
dbgs() << ", true = BB" << TrueMBB->getNumber() << " size = "
|
|
<< TrueMBB->size() << " numPred = " << TrueMBB->pred_size();
|
|
if (Detail) {
|
|
dbgs() << "\n";
|
|
TrueMBB->print(dbgs());
|
|
dbgs() << "\n";
|
|
}
|
|
}
|
|
if (FalseMBB) {
|
|
dbgs() << ", false = BB" << FalseMBB->getNumber() << " size = "
|
|
<< FalseMBB->size() << " numPred = " << FalseMBB->pred_size();
|
|
if (Detail) {
|
|
dbgs() << "\n";
|
|
FalseMBB->print(dbgs());
|
|
dbgs() << "\n";
|
|
}
|
|
}
|
|
if (LandMBB) {
|
|
dbgs() << ", land = BB" << LandMBB->getNumber() << " size = "
|
|
<< LandMBB->size() << " numPred = " << LandMBB->pred_size();
|
|
if (Detail) {
|
|
dbgs() << "\n";
|
|
LandMBB->print(dbgs());
|
|
dbgs() << "\n";
|
|
}
|
|
}
|
|
|
|
dbgs() << "\n";
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::improveSimpleJumpintoIf(MachineBasicBlock *HeadMBB,
|
|
MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB,
|
|
MachineBasicBlock **LandMBBPtr) {
|
|
bool MigrateTrue = false;
|
|
bool MigrateFalse = false;
|
|
|
|
MachineBasicBlock *LandBlk = *LandMBBPtr;
|
|
|
|
assert((!TrueMBB || TrueMBB->succ_size() <= 1)
|
|
&& (!FalseMBB || FalseMBB->succ_size() <= 1));
|
|
|
|
if (TrueMBB == FalseMBB)
|
|
return 0;
|
|
|
|
MigrateTrue = needMigrateBlock(TrueMBB);
|
|
MigrateFalse = needMigrateBlock(FalseMBB);
|
|
|
|
if (!MigrateTrue && !MigrateFalse)
|
|
return 0;
|
|
|
|
// If we need to migrate either trueBlk and falseBlk, migrate the rest that
|
|
// have more than one predecessors. without doing this, its predecessor
|
|
// rather than headBlk will have undefined value in initReg.
|
|
if (!MigrateTrue && TrueMBB && TrueMBB->pred_size() > 1)
|
|
MigrateTrue = true;
|
|
if (!MigrateFalse && FalseMBB && FalseMBB->pred_size() > 1)
|
|
MigrateFalse = true;
|
|
|
|
DEBUG(
|
|
dbgs() << "before improveSimpleJumpintoIf: ";
|
|
showImproveSimpleJumpintoIf(HeadMBB, TrueMBB, FalseMBB, LandBlk, 0);
|
|
);
|
|
|
|
// org: headBlk => if () {trueBlk} else {falseBlk} => landBlk
|
|
//
|
|
// new: headBlk => if () {initReg = 1; org trueBlk branch} else
|
|
// {initReg = 0; org falseBlk branch }
|
|
// => landBlk => if (initReg) {org trueBlk} else {org falseBlk}
|
|
// => org landBlk
|
|
// if landBlk->pred_size() > 2, put the about if-else inside
|
|
// if (initReg !=2) {...}
|
|
//
|
|
// add initReg = initVal to headBlk
|
|
|
|
const TargetRegisterClass * I32RC = TRI->getCFGStructurizerRegClass(MVT::i32);
|
|
if (!MigrateTrue || !MigrateFalse) {
|
|
// XXX: We have an opportunity here to optimize the "branch into if" case
|
|
// here. Branch into if looks like this:
|
|
// entry
|
|
// / |
|
|
// diamond_head branch_from
|
|
// / \ |
|
|
// diamond_false diamond_true
|
|
// \ /
|
|
// done
|
|
//
|
|
// The diamond_head block begins the "if" and the diamond_true block
|
|
// is the block being "branched into".
|
|
//
|
|
// If MigrateTrue is true, then TrueBB is the block being "branched into"
|
|
// and if MigrateFalse is true, then FalseBB is the block being
|
|
// "branched into"
|
|
//
|
|
// Here is the pseudo code for how I think the optimization should work:
|
|
// 1. Insert MOV GPR0, 0 before the branch instruction in diamond_head.
|
|
// 2. Insert MOV GPR0, 1 before the branch instruction in branch_from.
|
|
// 3. Move the branch instruction from diamond_head into its own basic
|
|
// block (new_block).
|
|
// 4. Add an unconditional branch from diamond_head to new_block
|
|
// 5. Replace the branch instruction in branch_from with an unconditional
|
|
// branch to new_block. If branch_from has multiple predecessors, then
|
|
// we need to replace the True/False block in the branch
|
|
// instruction instead of replacing it.
|
|
// 6. Change the condition of the branch instruction in new_block from
|
|
// COND to (COND || GPR0)
|
|
//
|
|
// In order insert these MOV instruction, we will need to use the
|
|
// RegisterScavenger. Usually liveness stops being tracked during
|
|
// the late machine optimization passes, however if we implement
|
|
// bool TargetRegisterInfo::requiresRegisterScavenging(
|
|
// const MachineFunction &MF)
|
|
// and have it return true, liveness will be tracked correctly
|
|
// by generic optimization passes. We will also need to make sure that
|
|
// all of our target-specific passes that run after regalloc and before
|
|
// the CFGStructurizer track liveness and we will need to modify this pass
|
|
// to correctly track liveness.
|
|
//
|
|
// After the above changes, the new CFG should look like this:
|
|
// entry
|
|
// / |
|
|
// diamond_head branch_from
|
|
// \ /
|
|
// new_block
|
|
// / |
|
|
// diamond_false diamond_true
|
|
// \ /
|
|
// done
|
|
//
|
|
// Without this optimization, we are forced to duplicate the diamond_true
|
|
// block and we will end up with a CFG like this:
|
|
//
|
|
// entry
|
|
// / |
|
|
// diamond_head branch_from
|
|
// / \ |
|
|
// diamond_false diamond_true diamond_true (duplicate)
|
|
// \ / |
|
|
// done --------------------|
|
|
//
|
|
// Duplicating diamond_true can be very costly especially if it has a
|
|
// lot of instructions.
|
|
return 0;
|
|
}
|
|
|
|
int NumNewBlk = 0;
|
|
|
|
bool LandBlkHasOtherPred = (LandBlk->pred_size() > 2);
|
|
|
|
//insert AMDGPU::ENDIF to avoid special case "input landBlk == NULL"
|
|
MachineBasicBlock::iterator I = insertInstrBefore(LandBlk, AMDGPU::ENDIF);
|
|
|
|
if (LandBlkHasOtherPred) {
|
|
llvm_unreachable("Extra register needed to handle CFG");
|
|
unsigned CmpResReg =
|
|
HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC);
|
|
llvm_unreachable("Extra compare instruction needed to handle CFG");
|
|
insertCondBranchBefore(LandBlk, I, AMDGPU::IF_PREDICATE_SET,
|
|
CmpResReg, DebugLoc());
|
|
}
|
|
|
|
// XXX: We are running this after RA, so creating virtual registers will
|
|
// cause an assertion failure in the PostRA scheduling pass.
|
|
unsigned InitReg =
|
|
HeadMBB->getParent()->getRegInfo().createVirtualRegister(I32RC);
|
|
insertCondBranchBefore(LandBlk, I, AMDGPU::IF_PREDICATE_SET, InitReg,
|
|
DebugLoc());
|
|
|
|
if (MigrateTrue) {
|
|
migrateInstruction(TrueMBB, LandBlk, I);
|
|
// need to uncondionally insert the assignment to ensure a path from its
|
|
// predecessor rather than headBlk has valid value in initReg if
|
|
// (initVal != 1).
|
|
llvm_unreachable("Extra register needed to handle CFG");
|
|
}
|
|
insertInstrBefore(I, AMDGPU::ELSE);
|
|
|
|
if (MigrateFalse) {
|
|
migrateInstruction(FalseMBB, LandBlk, I);
|
|
// need to uncondionally insert the assignment to ensure a path from its
|
|
// predecessor rather than headBlk has valid value in initReg if
|
|
// (initVal != 0)
|
|
llvm_unreachable("Extra register needed to handle CFG");
|
|
}
|
|
|
|
if (LandBlkHasOtherPred) {
|
|
// add endif
|
|
insertInstrBefore(I, AMDGPU::ENDIF);
|
|
|
|
// put initReg = 2 to other predecessors of landBlk
|
|
for (MachineBasicBlock::pred_iterator PI = LandBlk->pred_begin(),
|
|
PE = LandBlk->pred_end(); PI != PE; ++PI) {
|
|
MachineBasicBlock *MBB = *PI;
|
|
if (MBB != TrueMBB && MBB != FalseMBB)
|
|
llvm_unreachable("Extra register needed to handle CFG");
|
|
}
|
|
}
|
|
DEBUG(
|
|
dbgs() << "result from improveSimpleJumpintoIf: ";
|
|
showImproveSimpleJumpintoIf(HeadMBB, TrueMBB, FalseMBB, LandBlk, 0);
|
|
);
|
|
|
|
// update landBlk
|
|
*LandMBBPtr = LandBlk;
|
|
|
|
return NumNewBlk;
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::handleLoopcontBlock(MachineBasicBlock *ContingMBB,
|
|
MachineLoop *ContingLoop, MachineBasicBlock *ContMBB,
|
|
MachineLoop *ContLoop) {
|
|
DEBUG(dbgs() << "loopcontPattern cont = BB" << ContingMBB->getNumber()
|
|
<< " header = BB" << ContMBB->getNumber() << "\n";
|
|
dbgs() << "Trying to continue loop-depth = "
|
|
<< getLoopDepth(ContLoop)
|
|
<< " from loop-depth = " << getLoopDepth(ContingLoop) << "\n";);
|
|
settleLoopcontBlock(ContingMBB, ContMBB);
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::mergeSerialBlock(MachineBasicBlock *DstMBB,
|
|
MachineBasicBlock *SrcMBB) {
|
|
DEBUG(
|
|
dbgs() << "serialPattern BB" << DstMBB->getNumber()
|
|
<< " <= BB" << SrcMBB->getNumber() << "\n";
|
|
);
|
|
DstMBB->splice(DstMBB->end(), SrcMBB, SrcMBB->begin(), SrcMBB->end());
|
|
|
|
DstMBB->removeSuccessor(SrcMBB);
|
|
cloneSuccessorList(DstMBB, SrcMBB);
|
|
|
|
removeSuccessor(SrcMBB);
|
|
MLI->removeBlock(SrcMBB);
|
|
retireBlock(SrcMBB);
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::mergeIfthenelseBlock(MachineInstr *BranchMI,
|
|
MachineBasicBlock *MBB, MachineBasicBlock *TrueMBB,
|
|
MachineBasicBlock *FalseMBB, MachineBasicBlock *LandMBB) {
|
|
assert (TrueMBB);
|
|
DEBUG(
|
|
dbgs() << "ifPattern BB" << MBB->getNumber();
|
|
dbgs() << "{ ";
|
|
if (TrueMBB) {
|
|
dbgs() << "BB" << TrueMBB->getNumber();
|
|
}
|
|
dbgs() << " } else ";
|
|
dbgs() << "{ ";
|
|
if (FalseMBB) {
|
|
dbgs() << "BB" << FalseMBB->getNumber();
|
|
}
|
|
dbgs() << " }\n ";
|
|
dbgs() << "landBlock: ";
|
|
if (!LandMBB) {
|
|
dbgs() << "NULL";
|
|
} else {
|
|
dbgs() << "BB" << LandMBB->getNumber();
|
|
}
|
|
dbgs() << "\n";
|
|
);
|
|
|
|
int OldOpcode = BranchMI->getOpcode();
|
|
DebugLoc BranchDL = BranchMI->getDebugLoc();
|
|
|
|
// transform to
|
|
// if cond
|
|
// trueBlk
|
|
// else
|
|
// falseBlk
|
|
// endif
|
|
// landBlk
|
|
|
|
MachineBasicBlock::iterator I = BranchMI;
|
|
insertCondBranchBefore(I, getBranchNzeroOpcode(OldOpcode),
|
|
BranchDL);
|
|
|
|
if (TrueMBB) {
|
|
MBB->splice(I, TrueMBB, TrueMBB->begin(), TrueMBB->end());
|
|
MBB->removeSuccessor(TrueMBB);
|
|
if (LandMBB && TrueMBB->succ_size()!=0)
|
|
TrueMBB->removeSuccessor(LandMBB);
|
|
retireBlock(TrueMBB);
|
|
MLI->removeBlock(TrueMBB);
|
|
}
|
|
|
|
if (FalseMBB) {
|
|
insertInstrBefore(I, AMDGPU::ELSE);
|
|
MBB->splice(I, FalseMBB, FalseMBB->begin(),
|
|
FalseMBB->end());
|
|
MBB->removeSuccessor(FalseMBB);
|
|
if (LandMBB && FalseMBB->succ_size() != 0)
|
|
FalseMBB->removeSuccessor(LandMBB);
|
|
retireBlock(FalseMBB);
|
|
MLI->removeBlock(FalseMBB);
|
|
}
|
|
insertInstrBefore(I, AMDGPU::ENDIF);
|
|
|
|
BranchMI->eraseFromParent();
|
|
|
|
if (LandMBB && TrueMBB && FalseMBB)
|
|
MBB->addSuccessor(LandMBB);
|
|
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::mergeLooplandBlock(MachineBasicBlock *DstBlk,
|
|
MachineBasicBlock *LandMBB) {
|
|
DEBUG(dbgs() << "loopPattern header = BB" << DstBlk->getNumber()
|
|
<< " land = BB" << LandMBB->getNumber() << "\n";);
|
|
|
|
insertInstrBefore(DstBlk, AMDGPU::WHILELOOP, DebugLoc());
|
|
insertInstrEnd(DstBlk, AMDGPU::ENDLOOP, DebugLoc());
|
|
DstBlk->addSuccessor(LandMBB);
|
|
DstBlk->removeSuccessor(DstBlk);
|
|
}
|
|
|
|
|
|
void AMDGPUCFGStructurizer::mergeLoopbreakBlock(MachineBasicBlock *ExitingMBB,
|
|
MachineBasicBlock *LandMBB) {
|
|
DEBUG(dbgs() << "loopbreakPattern exiting = BB" << ExitingMBB->getNumber()
|
|
<< " land = BB" << LandMBB->getNumber() << "\n";);
|
|
MachineInstr *BranchMI = getLoopendBlockBranchInstr(ExitingMBB);
|
|
assert(BranchMI && isCondBranch(BranchMI));
|
|
DebugLoc DL = BranchMI->getDebugLoc();
|
|
MachineBasicBlock *TrueBranch = getTrueBranch(BranchMI);
|
|
MachineBasicBlock::iterator I = BranchMI;
|
|
if (TrueBranch != LandMBB)
|
|
reversePredicateSetter(I);
|
|
insertCondBranchBefore(ExitingMBB, I, AMDGPU::IF_PREDICATE_SET, AMDGPU::PREDICATE_BIT, DL);
|
|
insertInstrBefore(I, AMDGPU::BREAK);
|
|
insertInstrBefore(I, AMDGPU::ENDIF);
|
|
//now branchInst can be erase safely
|
|
BranchMI->eraseFromParent();
|
|
//now take care of successors, retire blocks
|
|
ExitingMBB->removeSuccessor(LandMBB);
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::settleLoopcontBlock(MachineBasicBlock *ContingMBB,
|
|
MachineBasicBlock *ContMBB) {
|
|
DEBUG(dbgs() << "settleLoopcontBlock conting = BB"
|
|
<< ContingMBB->getNumber()
|
|
<< ", cont = BB" << ContMBB->getNumber() << "\n";);
|
|
|
|
MachineInstr *MI = getLoopendBlockBranchInstr(ContingMBB);
|
|
if (MI) {
|
|
assert(isCondBranch(MI));
|
|
MachineBasicBlock::iterator I = MI;
|
|
MachineBasicBlock *TrueBranch = getTrueBranch(MI);
|
|
int OldOpcode = MI->getOpcode();
|
|
DebugLoc DL = MI->getDebugLoc();
|
|
|
|
bool UseContinueLogical = ((&*ContingMBB->rbegin()) == MI);
|
|
|
|
if (UseContinueLogical == false) {
|
|
int BranchOpcode =
|
|
TrueBranch == ContMBB ? getBranchNzeroOpcode(OldOpcode) :
|
|
getBranchZeroOpcode(OldOpcode);
|
|
insertCondBranchBefore(I, BranchOpcode, DL);
|
|
// insertEnd to ensure phi-moves, if exist, go before the continue-instr.
|
|
insertInstrEnd(ContingMBB, AMDGPU::CONTINUE, DL);
|
|
insertInstrEnd(ContingMBB, AMDGPU::ENDIF, DL);
|
|
} else {
|
|
int BranchOpcode =
|
|
TrueBranch == ContMBB ? getContinueNzeroOpcode(OldOpcode) :
|
|
getContinueZeroOpcode(OldOpcode);
|
|
insertCondBranchBefore(I, BranchOpcode, DL);
|
|
}
|
|
|
|
MI->eraseFromParent();
|
|
} else {
|
|
// if we've arrived here then we've already erased the branch instruction
|
|
// travel back up the basic block to see the last reference of our debug
|
|
// location we've just inserted that reference here so it should be
|
|
// representative insertEnd to ensure phi-moves, if exist, go before the
|
|
// continue-instr.
|
|
insertInstrEnd(ContingMBB, AMDGPU::CONTINUE,
|
|
getLastDebugLocInBB(ContingMBB));
|
|
}
|
|
}
|
|
|
|
int AMDGPUCFGStructurizer::cloneOnSideEntryTo(MachineBasicBlock *PreMBB,
|
|
MachineBasicBlock *SrcMBB, MachineBasicBlock *DstMBB) {
|
|
int Cloned = 0;
|
|
assert(PreMBB->isSuccessor(SrcMBB));
|
|
while (SrcMBB && SrcMBB != DstMBB) {
|
|
assert(SrcMBB->succ_size() == 1);
|
|
if (SrcMBB->pred_size() > 1) {
|
|
SrcMBB = cloneBlockForPredecessor(SrcMBB, PreMBB);
|
|
++Cloned;
|
|
}
|
|
|
|
PreMBB = SrcMBB;
|
|
SrcMBB = *SrcMBB->succ_begin();
|
|
}
|
|
|
|
return Cloned;
|
|
}
|
|
|
|
MachineBasicBlock *
|
|
AMDGPUCFGStructurizer::cloneBlockForPredecessor(MachineBasicBlock *MBB,
|
|
MachineBasicBlock *PredMBB) {
|
|
assert(PredMBB->isSuccessor(MBB) &&
|
|
"succBlk is not a prececessor of curBlk");
|
|
|
|
MachineBasicBlock *CloneMBB = clone(MBB); //clone instructions
|
|
replaceInstrUseOfBlockWith(PredMBB, MBB, CloneMBB);
|
|
//srcBlk, oldBlk, newBlk
|
|
|
|
PredMBB->removeSuccessor(MBB);
|
|
PredMBB->addSuccessor(CloneMBB);
|
|
|
|
// add all successor to cloneBlk
|
|
cloneSuccessorList(CloneMBB, MBB);
|
|
|
|
numClonedInstr += MBB->size();
|
|
|
|
DEBUG(
|
|
dbgs() << "Cloned block: " << "BB"
|
|
<< MBB->getNumber() << "size " << MBB->size() << "\n";
|
|
);
|
|
|
|
SHOWNEWBLK(CloneMBB, "result of Cloned block: ");
|
|
|
|
return CloneMBB;
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::migrateInstruction(MachineBasicBlock *SrcMBB,
|
|
MachineBasicBlock *DstMBB, MachineBasicBlock::iterator I) {
|
|
MachineBasicBlock::iterator SpliceEnd;
|
|
//look for the input branchinstr, not the AMDGPU branchinstr
|
|
MachineInstr *BranchMI = getNormalBlockBranchInstr(SrcMBB);
|
|
if (!BranchMI) {
|
|
DEBUG(
|
|
dbgs() << "migrateInstruction don't see branch instr\n" ;
|
|
);
|
|
SpliceEnd = SrcMBB->end();
|
|
} else {
|
|
DEBUG(
|
|
dbgs() << "migrateInstruction see branch instr\n" ;
|
|
BranchMI->dump();
|
|
);
|
|
SpliceEnd = BranchMI;
|
|
}
|
|
DEBUG(
|
|
dbgs() << "migrateInstruction before splice dstSize = " << DstMBB->size()
|
|
<< "srcSize = " << SrcMBB->size() << "\n";
|
|
);
|
|
|
|
//splice insert before insertPos
|
|
DstMBB->splice(I, SrcMBB, SrcMBB->begin(), SpliceEnd);
|
|
|
|
DEBUG(
|
|
dbgs() << "migrateInstruction after splice dstSize = " << DstMBB->size()
|
|
<< "srcSize = " << SrcMBB->size() << "\n";
|
|
);
|
|
}
|
|
|
|
MachineBasicBlock *
|
|
AMDGPUCFGStructurizer::normalizeInfiniteLoopExit(MachineLoop* LoopRep) {
|
|
MachineBasicBlock *LoopHeader = LoopRep->getHeader();
|
|
MachineBasicBlock *LoopLatch = LoopRep->getLoopLatch();
|
|
const TargetRegisterClass * I32RC = TRI->getCFGStructurizerRegClass(MVT::i32);
|
|
|
|
if (!LoopHeader || !LoopLatch)
|
|
return NULL;
|
|
MachineInstr *BranchMI = getLoopendBlockBranchInstr(LoopLatch);
|
|
// Is LoopRep an infinite loop ?
|
|
if (!BranchMI || !isUncondBranch(BranchMI))
|
|
return NULL;
|
|
|
|
MachineBasicBlock *DummyExitBlk = FuncRep->CreateMachineBasicBlock();
|
|
FuncRep->push_back(DummyExitBlk); //insert to function
|
|
SHOWNEWBLK(DummyExitBlk, "DummyExitBlock to normalize infiniteLoop: ");
|
|
DEBUG(dbgs() << "Old branch instr: " << *BranchMI << "\n";);
|
|
MachineBasicBlock::iterator I = BranchMI;
|
|
unsigned ImmReg = FuncRep->getRegInfo().createVirtualRegister(I32RC);
|
|
llvm_unreachable("Extra register needed to handle CFG");
|
|
MachineInstr *NewMI = insertInstrBefore(I, AMDGPU::BRANCH_COND_i32);
|
|
MachineInstrBuilder MIB(*FuncRep, NewMI);
|
|
MIB.addMBB(LoopHeader);
|
|
MIB.addReg(ImmReg, false);
|
|
SHOWNEWINSTR(NewMI);
|
|
BranchMI->eraseFromParent();
|
|
LoopLatch->addSuccessor(DummyExitBlk);
|
|
|
|
return DummyExitBlk;
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::removeUnconditionalBranch(MachineBasicBlock *MBB) {
|
|
MachineInstr *BranchMI;
|
|
|
|
// I saw two unconditional branch in one basic block in example
|
|
// test_fc_do_while_or.c need to fix the upstream on this to remove the loop.
|
|
while ((BranchMI = getLoopendBlockBranchInstr(MBB))
|
|
&& isUncondBranch(BranchMI)) {
|
|
DEBUG(dbgs() << "Removing uncond branch instr"; BranchMI->dump(););
|
|
BranchMI->eraseFromParent();
|
|
}
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::removeRedundantConditionalBranch(
|
|
MachineBasicBlock *MBB) {
|
|
if (MBB->succ_size() != 2)
|
|
return;
|
|
MachineBasicBlock *MBB1 = *MBB->succ_begin();
|
|
MachineBasicBlock *MBB2 = *std::next(MBB->succ_begin());
|
|
if (MBB1 != MBB2)
|
|
return;
|
|
|
|
MachineInstr *BranchMI = getNormalBlockBranchInstr(MBB);
|
|
assert(BranchMI && isCondBranch(BranchMI));
|
|
DEBUG(dbgs() << "Removing unneeded cond branch instr"; BranchMI->dump(););
|
|
BranchMI->eraseFromParent();
|
|
SHOWNEWBLK(MBB1, "Removing redundant successor");
|
|
MBB->removeSuccessor(MBB1);
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::addDummyExitBlock(
|
|
SmallVectorImpl<MachineBasicBlock*> &RetMBB) {
|
|
MachineBasicBlock *DummyExitBlk = FuncRep->CreateMachineBasicBlock();
|
|
FuncRep->push_back(DummyExitBlk); //insert to function
|
|
insertInstrEnd(DummyExitBlk, AMDGPU::RETURN);
|
|
|
|
for (SmallVectorImpl<MachineBasicBlock *>::iterator It = RetMBB.begin(),
|
|
E = RetMBB.end(); It != E; ++It) {
|
|
MachineBasicBlock *MBB = *It;
|
|
MachineInstr *MI = getReturnInstr(MBB);
|
|
if (MI)
|
|
MI->eraseFromParent();
|
|
MBB->addSuccessor(DummyExitBlk);
|
|
DEBUG(
|
|
dbgs() << "Add dummyExitBlock to BB" << MBB->getNumber()
|
|
<< " successors\n";
|
|
);
|
|
}
|
|
SHOWNEWBLK(DummyExitBlk, "DummyExitBlock: ");
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::removeSuccessor(MachineBasicBlock *MBB) {
|
|
while (MBB->succ_size())
|
|
MBB->removeSuccessor(*MBB->succ_begin());
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::recordSccnum(MachineBasicBlock *MBB,
|
|
int SccNum) {
|
|
BlockInformation *&srcBlkInfo = BlockInfoMap[MBB];
|
|
if (!srcBlkInfo)
|
|
srcBlkInfo = new BlockInformation();
|
|
srcBlkInfo->SccNum = SccNum;
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::retireBlock(MachineBasicBlock *MBB) {
|
|
DEBUG(
|
|
dbgs() << "Retiring BB" << MBB->getNumber() << "\n";
|
|
);
|
|
|
|
BlockInformation *&SrcBlkInfo = BlockInfoMap[MBB];
|
|
|
|
if (!SrcBlkInfo)
|
|
SrcBlkInfo = new BlockInformation();
|
|
|
|
SrcBlkInfo->IsRetired = true;
|
|
assert(MBB->succ_size() == 0 && MBB->pred_size() == 0
|
|
&& "can't retire block yet");
|
|
}
|
|
|
|
void AMDGPUCFGStructurizer::setLoopLandBlock(MachineLoop *loopRep,
|
|
MachineBasicBlock *MBB) {
|
|
MachineBasicBlock *&TheEntry = LLInfoMap[loopRep];
|
|
if (!MBB) {
|
|
MBB = FuncRep->CreateMachineBasicBlock();
|
|
FuncRep->push_back(MBB); //insert to function
|
|
SHOWNEWBLK(MBB, "DummyLandingBlock for loop without break: ");
|
|
}
|
|
TheEntry = MBB;
|
|
DEBUG(
|
|
dbgs() << "setLoopLandBlock loop-header = BB"
|
|
<< loopRep->getHeader()->getNumber()
|
|
<< " landing-block = BB" << MBB->getNumber() << "\n";
|
|
);
|
|
}
|
|
|
|
MachineBasicBlock *
|
|
AMDGPUCFGStructurizer::findNearestCommonPostDom(MachineBasicBlock *MBB1,
|
|
MachineBasicBlock *MBB2) {
|
|
|
|
if (PDT->dominates(MBB1, MBB2))
|
|
return MBB1;
|
|
if (PDT->dominates(MBB2, MBB1))
|
|
return MBB2;
|
|
|
|
MachineDomTreeNode *Node1 = PDT->getNode(MBB1);
|
|
MachineDomTreeNode *Node2 = PDT->getNode(MBB2);
|
|
|
|
// Handle newly cloned node.
|
|
if (!Node1 && MBB1->succ_size() == 1)
|
|
return findNearestCommonPostDom(*MBB1->succ_begin(), MBB2);
|
|
if (!Node2 && MBB2->succ_size() == 1)
|
|
return findNearestCommonPostDom(MBB1, *MBB2->succ_begin());
|
|
|
|
if (!Node1 || !Node2)
|
|
return NULL;
|
|
|
|
Node1 = Node1->getIDom();
|
|
while (Node1) {
|
|
if (PDT->dominates(Node1, Node2))
|
|
return Node1->getBlock();
|
|
Node1 = Node1->getIDom();
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
MachineBasicBlock *
|
|
AMDGPUCFGStructurizer::findNearestCommonPostDom(
|
|
std::set<MachineBasicBlock *> &MBBs) {
|
|
MachineBasicBlock *CommonDom;
|
|
std::set<MachineBasicBlock *>::const_iterator It = MBBs.begin();
|
|
std::set<MachineBasicBlock *>::const_iterator E = MBBs.end();
|
|
for (CommonDom = *It; It != E && CommonDom; ++It) {
|
|
MachineBasicBlock *MBB = *It;
|
|
if (MBB != CommonDom)
|
|
CommonDom = findNearestCommonPostDom(MBB, CommonDom);
|
|
}
|
|
|
|
DEBUG(
|
|
dbgs() << "Common post dominator for exit blocks is ";
|
|
if (CommonDom)
|
|
dbgs() << "BB" << CommonDom->getNumber() << "\n";
|
|
else
|
|
dbgs() << "NULL\n";
|
|
);
|
|
|
|
return CommonDom;
|
|
}
|
|
|
|
char AMDGPUCFGStructurizer::ID = 0;
|
|
|
|
} // end anonymous namespace
|
|
|
|
|
|
INITIALIZE_PASS_BEGIN(AMDGPUCFGStructurizer, "amdgpustructurizer",
|
|
"AMDGPU CFG Structurizer", false, false)
|
|
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
|
|
INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree)
|
|
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
|
|
INITIALIZE_PASS_END(AMDGPUCFGStructurizer, "amdgpustructurizer",
|
|
"AMDGPU CFG Structurizer", false, false)
|
|
|
|
FunctionPass *llvm::createAMDGPUCFGStructurizerPass() {
|
|
return new AMDGPUCFGStructurizer();
|
|
}
|