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https://github.com/c64scene-ar/llvm-6502.git
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44c2d61b67
- Due to the current matching vector elements constraints in ISD::FP_ROUND, rounding from v2f64 to v4f32 (after legalization from v2f32) is scalarized. Add a customized v2f32 widening to convert it into a target-specific X86ISD::VFPROUND to work around this constraints. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165631 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
1.2 KiB
LLVM
59 lines
1.2 KiB
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | FileCheck %s
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; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s --check-prefix=AVX
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define <1 x float> @test1(<1 x double> %x) nounwind {
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; CHECK: test1
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; CHECK: cvtsd2ss
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; CHECK: ret
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; AVX: test1
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; AVX: vcvtsd2ss
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; AVX: ret
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%y = fptrunc <1 x double> %x to <1 x float>
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ret <1 x float> %y
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}
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define <2 x float> @test2(<2 x double> %x) nounwind {
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; CHECK: test2
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; CHECK: cvtpd2ps
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; CHECK: ret
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; AVX: test2
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; AVX-NOT: vcvtpd2psy
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; AVX: vcvtpd2ps
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; AVX: ret
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%y = fptrunc <2 x double> %x to <2 x float>
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ret <2 x float> %y
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}
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define <4 x float> @test3(<4 x double> %x) nounwind {
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; CHECK: test3
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; CHECK: cvtpd2ps
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; CHECK: cvtpd2ps
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; CHECK: movlhps
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; CHECK: ret
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; AVX: test3
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; AVX: vcvtpd2psy
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; AVX: ret
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%y = fptrunc <4 x double> %x to <4 x float>
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ret <4 x float> %y
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}
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define <8 x float> @test4(<8 x double> %x) nounwind {
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; CHECK: test4
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; CHECK: cvtpd2ps
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; CHECK: cvtpd2ps
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; CHECK: movlhps
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; CHECK: cvtpd2ps
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; CHECK: cvtpd2ps
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; CHECK: movlhps
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; CHECK: ret
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; AVX: test4
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; AVX: vcvtpd2psy
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; AVX: vcvtpd2psy
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; AVX: vinsertf128
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; AVX: ret
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%y = fptrunc <8 x double> %x to <8 x float>
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ret <8 x float> %y
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}
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