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65b74e1d00
instruction introduced in AVX, which can operate on 128 and 256-bit vectors. It considers a 256-bit vector as two independent 128-bit lanes. It can permute any 32 or 64 elements inside a lane, and restricts the second lane to have the same permutation of the first one. With the improved splat support introduced early today, adding codegen for this instruction enable more efficient 256-bit code: Instead of: vextractf128 $0, %ymm0, %xmm0 punpcklbw %xmm0, %xmm0 punpckhbw %xmm0, %xmm0 vinsertf128 $0, %xmm0, %ymm0, %ymm1 vinsertf128 $1, %xmm0, %ymm1, %ymm0 vextractf128 $1, %ymm0, %xmm1 shufps $1, %xmm1, %xmm1 movss %xmm1, 28(%rsp) movss %xmm1, 24(%rsp) movss %xmm1, 20(%rsp) movss %xmm1, 16(%rsp) vextractf128 $0, %ymm0, %xmm0 shufps $1, %xmm0, %xmm0 movss %xmm0, 12(%rsp) movss %xmm0, 8(%rsp) movss %xmm0, 4(%rsp) movss %xmm0, (%rsp) vmovaps (%rsp), %ymm0 We get: vextractf128 $0, %ymm0, %xmm0 punpcklbw %xmm0, %xmm0 punpckhbw %xmm0, %xmm0 vinsertf128 $0, %xmm0, %ymm0, %ymm1 vinsertf128 $1, %xmm0, %ymm1, %ymm0 vpermilps $85, %ymm0, %ymm0 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135662 91177308-0d34-0410-b5e6-96231b3b80d8
102 lines
3.4 KiB
C++
102 lines
3.4 KiB
C++
//===-- X86ShuffleDecode.h - X86 shuffle decode logic -----------*-C++-*---===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Define several functions to decode x86 specific shuffle semantics into a
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// generic vector mask.
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//
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//===----------------------------------------------------------------------===//
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#ifndef X86_SHUFFLE_DECODE_H
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#define X86_SHUFFLE_DECODE_H
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/ValueTypes.h"
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//===----------------------------------------------------------------------===//
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// Vector Mask Decoding
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//===----------------------------------------------------------------------===//
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namespace llvm {
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enum {
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SM_SentinelZero = ~0U
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};
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void DecodeINSERTPSMask(unsigned Imm, SmallVectorImpl<unsigned> &ShuffleMask);
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// <3,1> or <6,7,2,3>
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void DecodeMOVHLPSMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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// <0,2> or <0,1,4,5>
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void DecodeMOVLHPSMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePSHUFMask(unsigned NElts, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePSHUFHWMask(unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePSHUFLWMask(unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePUNPCKLBWMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePUNPCKLWDMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePUNPCKLDQMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePUNPCKLQDQMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePUNPCKLMask(EVT VT,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodePUNPCKHMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeSHUFPSMask(unsigned NElts, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeUNPCKHPMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeUNPCKLPSMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeUNPCKLPDMask(unsigned NElts,
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SmallVectorImpl<unsigned> &ShuffleMask);
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/// DecodeUNPCKLPMask - This decodes the shuffle masks for unpcklps/unpcklpd
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/// etc. VT indicates the type of the vector allowing it to handle different
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/// datatypes and vector widths.
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void DecodeUNPCKLPMask(EVT VT,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeVPERMILPSMask(unsigned NElts, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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void DecodeVPERMILPDMask(unsigned NElts, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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// DecodeVPERMILMask - Decodes VPERMIL permutes for any 128-bit
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// with 32/64-bit elements. For 256-bit vectors, it's considered
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// as two 128 lanes and the mask of the first lane should be
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// identical of the second one.
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void DecodeVPERMILMask(EVT VT, unsigned Imm,
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SmallVectorImpl<unsigned> &ShuffleMask);
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} // llvm namespace
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#endif
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