Tom Stellard 434e097df8 R600/SI: Don't print offset0/offset1 DS operands when they are 0 ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234379 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-08 01:09:19 +00:00
..
AArch64	[DAGCombiner] Combine shuffles of BUILD_VECTOR and SCALAR_TO_VECTOR	2015-04-03 10:02:21 +00:00
ARM	Verifier: Check that inlined-at locations agree	2015-04-03 16:54:30 +00:00
BPF	[bpf] mark mov instructions as ReMaterializable	2015-03-31 02:49:58 +00:00
CPP
Generic
Hexagon	Expand MUX instructions early on Hexagon	2015-03-31 13:35:12 +00:00
Inputs
Mips	Use sext in fast isel.	2015-04-06 22:29:07 +00:00
MSP430
NVPTX	[NVPTX] Associate a minimum PTX version for each SM architecture	2015-03-30 19:30:55 +00:00
PowerPC	Strip trailing whitespace and reword explanatory comment.	2015-04-04 02:26:47 +00:00
R600	R600/SI: Don't print offset0/offset1 DS operands when they are 0	2015-04-08 01:09:19 +00:00
SPARC
SystemZ	[SystemZ] Support transactional execution on zEC12	2015-04-01 12:51:43 +00:00
Thumb
Thumb2
WinEH	[WinEH] Fix xdata generation when no catch object is present	2015-04-07 19:46:38 +00:00
X86	Add test showing that MachineLICM is calculating register pressure wrong	2015-04-07 11:41:40 +00:00
XCore