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https://github.com/c64scene-ar/llvm-6502.git
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ba61446a56
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206877 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
1.9 KiB
LLVM
63 lines
1.9 KiB
LLVM
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
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; arm64 has tests for i64 versions, uses different approach for others.
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define i64 @test_vabsd_s64(i64 %a) {
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; CHECK: test_vabsd_s64
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; CHECK: abs {{d[0-9]+}}, {{d[0-9]+}}
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entry:
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%vabs.i = insertelement <1 x i64> undef, i64 %a, i32 0
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%vabs1.i = tail call <1 x i64> @llvm.aarch64.neon.vabs(<1 x i64> %vabs.i)
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%0 = extractelement <1 x i64> %vabs1.i, i32 0
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ret i64 %0
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}
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declare <1 x i64> @llvm.aarch64.neon.vabs(<1 x i64>)
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define i8 @test_vqabsb_s8(i8 %a) {
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; CHECK: test_vqabsb_s8
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; CHECK: sqabs {{b[0-9]+}}, {{b[0-9]+}}
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entry:
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%vqabs.i = insertelement <1 x i8> undef, i8 %a, i32 0
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%vqabs1.i = call <1 x i8> @llvm.arm.neon.vqabs.v1i8(<1 x i8> %vqabs.i)
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%0 = extractelement <1 x i8> %vqabs1.i, i32 0
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ret i8 %0
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}
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declare <1 x i8> @llvm.arm.neon.vqabs.v1i8(<1 x i8>)
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define i16 @test_vqabsh_s16(i16 %a) {
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; CHECK: test_vqabsh_s16
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; CHECK: sqabs {{h[0-9]+}}, {{h[0-9]+}}
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entry:
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%vqabs.i = insertelement <1 x i16> undef, i16 %a, i32 0
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%vqabs1.i = call <1 x i16> @llvm.arm.neon.vqabs.v1i16(<1 x i16> %vqabs.i)
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%0 = extractelement <1 x i16> %vqabs1.i, i32 0
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ret i16 %0
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}
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declare <1 x i16> @llvm.arm.neon.vqabs.v1i16(<1 x i16>)
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define i32 @test_vqabss_s32(i32 %a) {
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; CHECK: test_vqabss_s32
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; CHECK: sqabs {{s[0-9]+}}, {{s[0-9]+}}
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entry:
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%vqabs.i = insertelement <1 x i32> undef, i32 %a, i32 0
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%vqabs1.i = call <1 x i32> @llvm.arm.neon.vqabs.v1i32(<1 x i32> %vqabs.i)
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%0 = extractelement <1 x i32> %vqabs1.i, i32 0
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ret i32 %0
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}
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declare <1 x i32> @llvm.arm.neon.vqabs.v1i32(<1 x i32>)
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define i64 @test_vqabsd_s64(i64 %a) {
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; CHECK: test_vqabsd_s64
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; CHECK: sqabs {{d[0-9]+}}, {{d[0-9]+}}
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entry:
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%vqabs.i = insertelement <1 x i64> undef, i64 %a, i32 0
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%vqabs1.i = call <1 x i64> @llvm.arm.neon.vqabs.v1i64(<1 x i64> %vqabs.i)
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%0 = extractelement <1 x i64> %vqabs1.i, i32 0
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ret i64 %0
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}
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declare <1 x i64> @llvm.arm.neon.vqabs.v1i64(<1 x i64>)
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