Benjamin Kramer 1c10b8de46 BuildUDIV: If the divisor is even we can simplify the fixup of the multiplied value by introducing an early shift. ... This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into shrl $2, %edi imulq $613566757, %rdi, %rax shrq $32, %rax ret instead of movl %edi, %eax imulq $613566757, %rax, %rcx shrq $32, %rcx subl %ecx, %eax shrl %eax addl %ecx, %eax shrl $4, %eax on x86_64 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127829 91177308-0d34-0410-b5e6-96231b3b80d8		2011-03-17 20:39:14 +00:00
..
CMakeLists.txt
DAGCombiner.cpp	Avoid replacing the value of a directly stored load with the stored value if the load is indexed. rdar://9117613.	2011-03-11 00:48:56 +00:00
FastISel.cpp	Teach FastISel to support register-immediate-immediate instructions.	2011-03-11 21:33:55 +00:00
FunctionLoweringInfo.cpp
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp
LegalizeTypes.cpp
LegalizeTypes.h
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp
Makefile
ScheduleDAGFast.cpp	Re-commit 127368 and 127371. They are exonerated.	2011-03-10 00:16:32 +00:00
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp	Re-commit 127368 and 127371. They are exonerated.	2011-03-10 00:16:32 +00:00
ScheduleDAGSDNodes.cpp
ScheduleDAGSDNodes.h
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp	sext(undef) = 0, because the top bits will all be the same.	2011-03-15 02:22:10 +00:00
SelectionDAGBuilder.cpp	Move more logic into getTypeForExtArgOrReturn.	2011-03-17 14:53:37 +00:00
SelectionDAGBuilder.h
SelectionDAGISel.cpp
SelectionDAGPrinter.cpp
TargetLowering.cpp	BuildUDIV: If the divisor is even we can simplify the fixup of the multiplied value by introducing an early shift.	2011-03-17 20:39:14 +00:00
TargetSelectionDAGInfo.cpp