llvm-6502/test/CodeGen/X86/subreg-to-reg-0.ll
Dan Gohman e3d920699c Re-enable elimination of unnecessary SUBREG_TO_REG instructions in
LowerSubregs, and fix an x86-64 isel bug that this exposed.

SUBREG_TO_REG for x86-64 implicit zero extension is only safe for
isel to generate when the source is known to always have zeros in
the high 32 bits. The EXTRACT_SUBREG instruction does not clear
the high 32 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54444 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-07 02:54:50 +00:00

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LLVM

; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 1
; Do eliminate the zero-extension instruction and rely on
; x86-64's implicit zero-extension!
define i64 @foo(i32* %p) nounwind {
%t = load i32* %p
%n = add i32 %t, 1
%z = zext i32 %n to i64
ret i64 %z
}