llvm-6502/lib/Target/Mips/MCTargetDesc
Roman Divacky 536a88ad5b When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend
store this and use it to not emit long nops when the CPU is geode which
doesnt support them.

Fixes PR11212.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164132 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-18 16:08:49 +00:00
..
CMakeLists.txt Move the Mips only bits of the ELF writer to lib/Target/Mips. 2011-12-22 03:03:17 +00:00
LLVMBuild.txt LLVMBuild: Remove trailing newline, which irked me. 2011-12-12 19:48:00 +00:00
Makefile Test commit 2012-06-09 00:27:55 +00:00
MipsAsmBackend.cpp When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend 2012-09-18 16:08:49 +00:00
MipsBaseInfo.h The Mips standalone assembler fpu instruction support. 2012-09-07 00:23:42 +00:00
MipsELFObjectWriter.cpp For mips64 switch statements in subroutines could generate 2012-08-22 00:49:30 +00:00
MipsFixupKinds.h Mips relocations R_MIPS_HIGHER and R_MIPS_HIGHEST. 2012-08-06 21:26:03 +00:00
MipsMCAsmInfo.cpp remove Emacs-tag form .cpp files in Mips Backend, and fix some typo. 2012-02-17 08:55:11 +00:00
MipsMCAsmInfo.h Prune some includes 2012-03-27 07:54:11 +00:00
MipsMCCodeEmitter.cpp Remove unused private fields to silence -Wunused-private-field. 2012-09-15 17:08:51 +00:00
MipsMCTargetDesc.cpp Add disassembler to MIPS. 2012-04-17 18:03:21 +00:00
MipsMCTargetDesc.h When creating MCAsmBackend pass the CPU string as well. In X86AsmBackend 2012-09-18 16:08:49 +00:00