llvm-6502/test/CodeGen
Rafael Espindola a21d820952 Add segmented stack support for DragonFlyBSD.
Patch by Michael Neumann.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224936 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-29 15:47:28 +00:00
..
AArch64 Lower multiply-negate operation to mneg on AArch64 2014-12-22 13:38:58 +00:00
ARM [ARM] Don't break alignment when combining base updates into load/stores. 2014-12-23 06:07:31 +00:00
CPP
Generic CodeGen: do not attempt to invalidate virtual registers for zero-sized phis. 2014-12-19 20:50:07 +00:00
Hexagon [Hexagon] Reapplying 224775 load words. 2014-12-23 20:02:16 +00:00
Inputs
Mips [mips][microMIPS] Fix bugs related to atomic SC/LL instructions 2014-12-18 16:39:29 +00:00
MSP430
NVPTX
PowerPC PowerPC: CTR shouldn't fire if a TLS call is in the loop 2014-12-27 19:45:38 +00:00
R600 Enable (sext x) == C --> x == (trunc C) combine 2014-12-21 16:48:42 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86 Add segmented stack support for DragonFlyBSD. 2014-12-29 15:47:28 +00:00
XCore