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11abe69e98
Patch by Kit Barton. Support for the ICBT instruction is currently present, but limited to embedded processors. This change adds a new FeatureICBT that can be used to identify whether the ICBT instruction is available on a specific processor. Two new tests are added: * Positive test to ensure the icbt instruction is present when using -mcpu=pwr8 * Negative test to ensure the icbt instruction is not generated when using -mcpu=pwr7 Both test cases use the Prefetch opcode in LLVM. They are based on the ppc64-prefetch.ll test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226033 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
648 B
LLVM
20 lines
648 B
LLVM
; Test the ICBT instruction is not emitted on POWER7
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; Based on the ppc64-prefetch.ll test
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; RUN: not llc -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 < %s 2>&1 | FileCheck %s
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declare void @llvm.prefetch(i8*, i32, i32, i32)
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define void @test(i8* %a, ...) nounwind {
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entry:
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call void @llvm.prefetch(i8* %a, i32 0, i32 3, i32 0)
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ret void
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; FIXME: Crashing is not really the correct behavior here, we really should just emit nothing
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; CHECK: Cannot select: 0x{{[0-9,a-f]+}}: ch = Prefetch
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; CHECK: 0x{{[0-9,a-f]+}}: i32 = Constant<0>
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; CHECK-NEXT: 0x{{[0-9,a-f]+}}: i32 = Constant<3>
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; CHECK-NEXT: 0x{{[0-9,a-f]+}}: i32 = Constant<0>
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}
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