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https://github.com/c64scene-ar/llvm-6502.git
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b3f912b510
r186399 aggressively used the RISBG instruction for immediate ANDs, both because it can handle some values that AND IMMEDIATE can't, and because it allows the destination register to be different from the source. I realized later while implementing the distinct-ops support that it would be better to leave the choice up to convertToThreeAddress() instead. The AND IMMEDIATE form is shorter and is less likely to be cracked. This is a problem for 32-bit ANDs because we assume that all 32-bit operations will leave the high word untouched, whereas RISBG used in this way will either clear the high word or copy it from the source register. The patch uses the z196 instruction RISBLG for this instead. This means that z10 will be restricted to NILL, NILH and NILF for 32-bit ANDs, but I think that should be OK for now. Although we're using z10 as the base architecture, the optimization work is going to be focused more on z196 and zEC12. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187492 91177308-0d34-0410-b5e6-96231b3b80d8
184 lines
4.0 KiB
LLVM
184 lines
4.0 KiB
LLVM
; Test 64-bit ANDs in which the second operand is constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Use RISBG for a single bit.
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define i64 @f1(i64 %a) {
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; CHECK-LABEL: f1:
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; CHECK: risbg %r2, %r2, 63, 191, 0
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; CHECK: br %r14
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%and = and i64 %a, 1
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ret i64 %and
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}
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; Likewise 0xfffe.
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define i64 @f2(i64 %a) {
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; CHECK-LABEL: f2:
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; CHECK: risbg %r2, %r2, 48, 190, 0
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; CHECK: br %r14
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%and = and i64 %a, 65534
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ret i64 %and
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}
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; ...but 0xffff is a 16-bit zero extension.
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define i64 @f3(i64 %a, i64 %b) {
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; CHECK-LABEL: f3:
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; CHECK: llghr %r2, %r3
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; CHECK: br %r14
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%and = and i64 %b, 65535
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ret i64 %and
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}
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; Check the next value up, which can again use RISBG.
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define i64 @f4(i64 %a) {
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; CHECK-LABEL: f4:
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; CHECK: risbg %r2, %r2, 47, 175, 0
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; CHECK: br %r14
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%and = and i64 %a, 65536
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ret i64 %and
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}
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; Check 0xfffffffe, which can also use RISBG.
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define i64 @f5(i64 %a) {
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; CHECK-LABEL: f5:
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; CHECK: risbg %r2, %r2, 32, 190, 0
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; CHECK: br %r14
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%and = and i64 %a, 4294967294
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ret i64 %and
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}
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; Check the next value up, which is a 32-bit zero extension.
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define i64 @f6(i64 %a, i64 %b) {
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; CHECK-LABEL: f6:
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; CHECK: llgfr %r2, %r3
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; CHECK: br %r14
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%and = and i64 %b, 4294967295
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ret i64 %and
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}
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; Check the lowest useful NIHF value (0x00000001_ffffffff).
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define i64 @f7(i64 %a) {
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; CHECK-LABEL: f7:
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; CHECK: nihf %r2, 1
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; CHECK: br %r14
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%and = and i64 %a, 8589934591
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ret i64 %and
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}
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; ...but RISBG can be used if a three-address form is useful.
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define i64 @f8(i64 %a, i64 %b) {
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; CHECK-LABEL: f8:
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; CHECK: risbg %r2, %r3, 31, 191, 0
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; CHECK: br %r14
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%and = and i64 %b, 8589934591
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ret i64 %and
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}
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; Check the lowest NIHH value outside the RISBG range (0x0002ffff_ffffffff).
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define i64 @f9(i64 %a) {
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; CHECK-LABEL: f9:
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; CHECK: nihh %r2, 2
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; CHECK: br %r14
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%and = and i64 %a, 844424930131967
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ret i64 %and
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}
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; Check the highest NIHH value outside the RISBG range (0xfffaffff_ffffffff).
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define i64 @f10(i64 %a) {
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; CHECK-LABEL: f10:
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; CHECK: nihh %r2, 65530
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; CHECK: br %r14
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%and = and i64 %a, -1407374883553281
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ret i64 %and
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}
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; Check the highest useful NIHF value (0xfffefffe_ffffffff).
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define i64 @f11(i64 %a) {
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; CHECK-LABEL: f11:
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; CHECK: nihf %r2, 4294901758
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; CHECK: br %r14
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%and = and i64 %a, -281479271677953
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ret i64 %and
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}
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; Check the lowest NIHL value outside the RISBG range (0xffff0002_ffffffff).
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define i64 @f12(i64 %a) {
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; CHECK-LABEL: f12:
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; CHECK: nihl %r2, 2
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; CHECK: br %r14
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%and = and i64 %a, -281462091808769
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ret i64 %and
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}
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; Check the highest NIHL value outside the RISBG range (0xfffffffa_ffffffff).
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define i64 @f13(i64 %a) {
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; CHECK-LABEL: f13:
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; CHECK: nihl %r2, 65530
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; CHECK: br %r14
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%and = and i64 %a, -21474836481
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ret i64 %and
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}
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; Check the lowest NILF value outside the RISBG range (0xffffffff_00000002).
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define i64 @f14(i64 %a) {
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; CHECK-LABEL: f14:
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; CHECK: nilf %r2, 2
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; CHECK: br %r14
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%and = and i64 %a, -4294967294
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ret i64 %and
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}
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; Check the lowest NILH value outside the RISBG range (0xffffffff_0002ffff).
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define i64 @f15(i64 %a) {
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; CHECK-LABEL: f15:
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; CHECK: nilh %r2, 2
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; CHECK: br %r14
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%and = and i64 %a, -4294770689
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ret i64 %and
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}
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; Check the next value up, which must use NILF.
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define i64 @f16(i64 %a) {
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; CHECK-LABEL: f16:
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; CHECK: nilf %r2, 196608
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; CHECK: br %r14
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%and = and i64 %a, -4294770688
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ret i64 %and
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}
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; Check the highest NILH value outside the RISBG range (0xffffffff_fffaffff).
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define i64 @f17(i64 %a) {
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; CHECK-LABEL: f17:
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; CHECK: nilh %r2, 65530
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; CHECK: br %r14
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%and = and i64 %a, -327681
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ret i64 %and
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}
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; Check the maximum useful NILF value (0xffffffff_fffefffe).
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define i64 @f18(i64 %a) {
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; CHECK-LABEL: f18:
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; CHECK: nilf %r2, 4294901758
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; CHECK: br %r14
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%and = and i64 %a, -65538
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ret i64 %and
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}
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; Check the lowest NILL value outside the RISBG range (0xffffffff_ffff0002).
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define i64 @f19(i64 %a) {
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; CHECK-LABEL: f19:
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; CHECK: nill %r2, 2
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; CHECK: br %r14
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%and = and i64 %a, -65534
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ret i64 %and
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}
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; Check the highest NILL value outside the RISBG range.
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define i64 @f20(i64 %a) {
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; CHECK-LABEL: f20:
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; CHECK: nill %r2, 65530
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; CHECK: br %r14
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%and = and i64 %a, -6
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ret i64 %and
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}
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