mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
89 lines
3.2 KiB
LLVM
89 lines
3.2 KiB
LLVM
; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s
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; CHECK: inc
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; CHECK-NOT: PTR
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; CHECK: {{$}}
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define signext i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) {
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entry:
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br label %bb
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bb: ; preds = %cond_next391, %entry
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%cnt.0 = phi i32 [ 0, %entry ], [ %tmp422445, %cond_next391 ] ; <i32> [#uses=1]
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%v.1 = phi i32 [ undef, %entry ], [ %tmp411, %cond_next391 ] ; <i32> [#uses=0]
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br i1 false, label %cond_true, label %cond_next127
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cond_true: ; preds = %bb
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store i8* null, i8** %byteptr, align 4
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store i8* null, i8** %byteptr, align 4
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br label %cond_next127
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cond_next127: ; preds = %cond_true, %bb
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%tmp151 = add i32 0, %round ; <i32> [#uses=1]
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%tmp153 = ashr i32 %tmp151, %scale ; <i32> [#uses=2]
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%tmp154155 = trunc i32 %tmp153 to i16 ; <i16> [#uses=1]
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%tmp154155156 = sext i16 %tmp154155 to i32 ; <i32> [#uses=1]
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%tmp158 = xor i32 %tmp154155156, %tmp153 ; <i32> [#uses=1]
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%tmp160 = or i32 %tmp158, %cnt.0 ; <i32> [#uses=1]
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%tmp171 = load i32, i32* %bitptr, align 4 ; <i32> [#uses=1]
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%tmp180181 = sext i16 0 to i32 ; <i32> [#uses=3]
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%tmp183 = add i32 %tmp160, 1 ; <i32> [#uses=1]
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br i1 false, label %cond_true188, label %cond_next245
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cond_true188: ; preds = %cond_next127
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ret i16 0
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cond_next245: ; preds = %cond_next127
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%tmp249 = ashr i32 %tmp180181, 8 ; <i32> [#uses=1]
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%tmp250 = add i32 %tmp171, %tmp249 ; <i32> [#uses=1]
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%tmp253444 = lshr i32 %tmp180181, 4 ; <i32> [#uses=1]
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%tmp254 = and i32 %tmp253444, 15 ; <i32> [#uses=1]
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%tmp256 = and i32 %tmp180181, 15 ; <i32> [#uses=2]
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%tmp264 = icmp ugt i32 %tmp250, 15 ; <i1> [#uses=1]
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br i1 %tmp264, label %cond_true267, label %cond_next391
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cond_true267: ; preds = %cond_next245
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store i8* null, i8** %byteptr, align 4
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store i8* null, i8** %byteptr, align 4
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br i1 false, label %cond_true289, label %cond_next327
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cond_true289: ; preds = %cond_true267
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ret i16 0
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cond_next327: ; preds = %cond_true267
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br i1 false, label %cond_true343, label %cond_next385
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cond_true343: ; preds = %cond_next327
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%tmp345 = load i8*, i8** %byteptr, align 4 ; <i8*> [#uses=1]
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store i8* null, i8** %byteptr, align 4
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br i1 false, label %cond_next385, label %cond_true352
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cond_true352: ; preds = %cond_true343
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store i8* %tmp345, i8** %byteptr, align 4
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br i1 false, label %cond_true364, label %cond_next385
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cond_true364: ; preds = %cond_true352
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ret i16 0
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cond_next385: ; preds = %cond_true352, %cond_true343, %cond_next327
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br label %cond_next391
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cond_next391: ; preds = %cond_next385, %cond_next245
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%tmp393 = load i32, i32* %source, align 4 ; <i32> [#uses=1]
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%tmp395 = load i32, i32* %bitptr, align 4 ; <i32> [#uses=2]
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%tmp396 = shl i32 %tmp393, %tmp395 ; <i32> [#uses=1]
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%tmp398 = sub i32 32, %tmp256 ; <i32> [#uses=1]
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%tmp405 = lshr i32 %tmp396, 31 ; <i32> [#uses=1]
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%tmp406 = add i32 %tmp405, -1 ; <i32> [#uses=1]
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%tmp409 = lshr i32 %tmp406, %tmp398 ; <i32> [#uses=1]
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%tmp411 = sub i32 0, %tmp409 ; <i32> [#uses=1]
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%tmp422445 = add i32 %tmp254, %tmp183 ; <i32> [#uses=2]
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%tmp426447 = add i32 %tmp395, %tmp256 ; <i32> [#uses=1]
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store i32 %tmp426447, i32* %bitptr, align 4
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%tmp429448 = icmp ult i32 %tmp422445, 63 ; <i1> [#uses=1]
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br i1 %tmp429448, label %bb, label %UnifiedReturnBlock
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UnifiedReturnBlock: ; preds = %cond_next391
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ret i16 0
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}
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