mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
74 lines
2.8 KiB
LLVM
74 lines
2.8 KiB
LLVM
; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - -no-integrated-as | FileCheck %s
|
|
|
|
; C code this came from
|
|
;bool cas(float volatile *p, float *expected, float desired) {
|
|
; bool success;
|
|
; __asm__ __volatile__("lock; cmpxchg %[desired], %[mem]; "
|
|
; "mov %[expected], %[expected_out]; "
|
|
; "sete %[success]"
|
|
; : [success] "=a" (success),
|
|
; [expected_out] "=rm" (*expected)
|
|
; : [expected] "a" (*expected),
|
|
; [desired] "q" (desired),
|
|
; [mem] "m" (*p)
|
|
; : "memory", "cc");
|
|
; return success;
|
|
;}
|
|
|
|
define zeroext i1 @cas(float* %p, float* %expected, float %desired) nounwind {
|
|
entry:
|
|
%p.addr = alloca float*, align 8
|
|
%expected.addr = alloca float*, align 8
|
|
%desired.addr = alloca float, align 4
|
|
%success = alloca i8, align 1
|
|
store float* %p, float** %p.addr, align 8
|
|
store float* %expected, float** %expected.addr, align 8
|
|
store float %desired, float* %desired.addr, align 4
|
|
%0 = load float*, float** %expected.addr, align 8
|
|
%1 = load float*, float** %expected.addr, align 8
|
|
%2 = load float, float* %1, align 4
|
|
%3 = load float, float* %desired.addr, align 4
|
|
%4 = load float*, float** %p.addr, align 8
|
|
%5 = call i8 asm sideeffect "lock; cmpxchg $3, $4; mov $2, $1; sete $0", "={ax},=*rm,{ax},q,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(float* %0, float %2, float %3, float* %4) nounwind
|
|
store i8 %5, i8* %success, align 1
|
|
%6 = load i8, i8* %success, align 1
|
|
%tobool = trunc i8 %6 to i1
|
|
ret i1 %tobool
|
|
}
|
|
|
|
; CHECK: @cas
|
|
; Make sure we're emitting a move from eax.
|
|
; CHECK: #APP
|
|
; CHECK-NEXT: lock;{{.*}}mov %eax,{{.*}}
|
|
; CHECK-NEXT: #NO_APP
|
|
|
|
define zeroext i1 @cas2(i8* %p, i8* %expected, i1 zeroext %desired) nounwind {
|
|
entry:
|
|
%p.addr = alloca i8*, align 8
|
|
%expected.addr = alloca i8*, align 8
|
|
%desired.addr = alloca i8, align 1
|
|
%success = alloca i8, align 1
|
|
store i8* %p, i8** %p.addr, align 8
|
|
store i8* %expected, i8** %expected.addr, align 8
|
|
%frombool = zext i1 %desired to i8
|
|
store i8 %frombool, i8* %desired.addr, align 1
|
|
%0 = load i8*, i8** %expected.addr, align 8
|
|
%1 = load i8*, i8** %expected.addr, align 8
|
|
%2 = load i8, i8* %1, align 1
|
|
%tobool = trunc i8 %2 to i1
|
|
%3 = load i8, i8* %desired.addr, align 1
|
|
%tobool1 = trunc i8 %3 to i1
|
|
%4 = load i8*, i8** %p.addr, align 8
|
|
%5 = call i8 asm sideeffect "lock; cmpxchg $3, $4; mov $2, $1; sete $0", "={ax},=*rm,{ax},q,*m,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i8* %0, i1 %tobool, i1 %tobool1, i8* %4) nounwind
|
|
store i8 %5, i8* %success, align 1
|
|
%6 = load i8, i8* %success, align 1
|
|
%tobool2 = trunc i8 %6 to i1
|
|
ret i1 %tobool2
|
|
}
|
|
|
|
; CHECK: @cas2
|
|
; Make sure we're emitting a move from %al here.
|
|
; CHECK: #APP
|
|
; CHECK-NEXT: lock;{{.*}}mov %al,{{.*}}
|
|
; CHECK-NEXT: #NO_APP
|