llvm-6502/test/CodeGen/X86/fast-isel-divrem.ll
Mehdi Amini 26d628d6ce Change the fast-isel-abort option from bool to int to enable "levels"
Summary:
Currently fast-isel-abort will only abort for regular instructions,
and just warn for function calls, terminators, function arguments.
There is already fast-isel-abort-args but nothing for calls and
terminators.

This change turns the fast-isel-abort options into an integer option,
so that multiple levels of strictness can be defined.
This will help no being surprised when the "abort" option indeed does
not abort, and enables the possibility to write test that verifies
that no intrinsics are forgotten by fast-isel.

Reviewers: resistor, echristo

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D7941

From: Mehdi Amini <mehdi.amini@apple.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230775 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 18:32:11 +00:00

123 lines
2.4 KiB
LLVM

; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
define i8 @test_sdiv8(i8 %dividend, i8 %divisor) nounwind {
entry:
%result = sdiv i8 %dividend, %divisor
ret i8 %result
}
; CHECK-LABEL: test_sdiv8:
; CHECK: movsbw
; CHECK: idivb
define i8 @test_srem8(i8 %dividend, i8 %divisor) nounwind {
entry:
%result = srem i8 %dividend, %divisor
ret i8 %result
}
; CHECK-LABEL: test_srem8:
; CHECK: movsbw
; CHECK: idivb
define i8 @test_udiv8(i8 %dividend, i8 %divisor) nounwind {
entry:
%result = udiv i8 %dividend, %divisor
ret i8 %result
}
; CHECK-LABEL: test_udiv8:
; CHECK: movzbw
; CHECK: divb
define i8 @test_urem8(i8 %dividend, i8 %divisor) nounwind {
entry:
%result = urem i8 %dividend, %divisor
ret i8 %result
}
; CHECK-LABEL: test_urem8:
; CHECK: movzbw
; CHECK: divb
define i16 @test_sdiv16(i16 %dividend, i16 %divisor) nounwind {
entry:
%result = sdiv i16 %dividend, %divisor
ret i16 %result
}
; CHECK-LABEL: test_sdiv16:
; CHECK: cwtd
; CHECK: idivw
define i16 @test_srem16(i16 %dividend, i16 %divisor) nounwind {
entry:
%result = srem i16 %dividend, %divisor
ret i16 %result
}
; CHECK-LABEL: test_srem16:
; CHECK: cwtd
; CHECK: idivw
define i16 @test_udiv16(i16 %dividend, i16 %divisor) nounwind {
entry:
%result = udiv i16 %dividend, %divisor
ret i16 %result
}
; CHECK-LABEL: test_udiv16:
; CHECK: xorl
; CHECK: divw
define i16 @test_urem16(i16 %dividend, i16 %divisor) nounwind {
entry:
%result = urem i16 %dividend, %divisor
ret i16 %result
}
; CHECK-LABEL: test_urem16:
; CHECK: xorl
; CHECK: divw
define i32 @test_sdiv32(i32 %dividend, i32 %divisor) nounwind {
entry:
%result = sdiv i32 %dividend, %divisor
ret i32 %result
}
; CHECK-LABEL: test_sdiv32:
; CHECK: cltd
; CHECK: idivl
define i32 @test_srem32(i32 %dividend, i32 %divisor) nounwind {
entry:
%result = srem i32 %dividend, %divisor
ret i32 %result
}
; CHECK-LABEL: test_srem32:
; CHECK: cltd
; CHECK: idivl
define i32 @test_udiv32(i32 %dividend, i32 %divisor) nounwind {
entry:
%result = udiv i32 %dividend, %divisor
ret i32 %result
}
; CHECK-LABEL: test_udiv32:
; CHECK: xorl
; CHECK: divl
define i32 @test_urem32(i32 %dividend, i32 %divisor) nounwind {
entry:
%result = urem i32 %dividend, %divisor
ret i32 %result
}
; CHECK-LABEL: test_urem32:
; CHECK: xorl
; CHECK: divl