mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
26d628d6ce
Summary: Currently fast-isel-abort will only abort for regular instructions, and just warn for function calls, terminators, function arguments. There is already fast-isel-abort-args but nothing for calls and terminators. This change turns the fast-isel-abort options into an integer option, so that multiple levels of strictness can be defined. This will help no being surprised when the "abort" option indeed does not abort, and enables the possibility to write test that verifies that no intrinsics are forgotten by fast-isel. Reviewers: resistor, echristo Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D7941 From: Mehdi Amini <mehdi.amini@apple.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230775 91177308-0d34-0410-b5e6-96231b3b80d8
63 lines
1.8 KiB
LLVM
63 lines
1.8 KiB
LLVM
; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
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; Test conditional move for the supported types (i16, i32, and i32) and
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; conditon input (argument or cmp). Currently i8 is not supported.
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define zeroext i16 @select_cmov_i16(i1 zeroext %cond, i16 zeroext %a, i16 zeroext %b) {
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; CHECK-LABEL: select_cmov_i16
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; CHECK: testb $1, %dil
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; CHECK-NEXT: cmovew %dx, %si
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; CHECK-NEXT: movzwl %si, %eax
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%1 = select i1 %cond, i16 %a, i16 %b
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ret i16 %1
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}
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define zeroext i16 @select_cmp_cmov_i16(i16 zeroext %a, i16 zeroext %b) {
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; CHECK-LABEL: select_cmp_cmov_i16
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; CHECK: cmpw %si, %di
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; CHECK-NEXT: cmovbw %di, %si
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; CHECK-NEXT: movzwl %si, %eax
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%1 = icmp ult i16 %a, %b
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%2 = select i1 %1, i16 %a, i16 %b
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ret i16 %2
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}
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define i32 @select_cmov_i32(i1 zeroext %cond, i32 %a, i32 %b) {
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; CHECK-LABEL: select_cmov_i32
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; CHECK: testb $1, %dil
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; CHECK-NEXT: cmovel %edx, %esi
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; CHECK-NEXT: movl %esi, %eax
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%1 = select i1 %cond, i32 %a, i32 %b
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ret i32 %1
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}
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define i32 @select_cmp_cmov_i32(i32 %a, i32 %b) {
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; CHECK-LABEL: select_cmp_cmov_i32
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; CHECK: cmpl %esi, %edi
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; CHECK-NEXT: cmovbl %edi, %esi
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; CHECK-NEXT: movl %esi, %eax
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%1 = icmp ult i32 %a, %b
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%2 = select i1 %1, i32 %a, i32 %b
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ret i32 %2
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}
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define i64 @select_cmov_i64(i1 zeroext %cond, i64 %a, i64 %b) {
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; CHECK-LABEL: select_cmov_i64
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; CHECK: testb $1, %dil
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; CHECK-NEXT: cmoveq %rdx, %rsi
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; CHECK-NEXT: movq %rsi, %rax
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%1 = select i1 %cond, i64 %a, i64 %b
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ret i64 %1
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}
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define i64 @select_cmp_cmov_i64(i64 %a, i64 %b) {
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; CHECK-LABEL: select_cmp_cmov_i64
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; CHECK: cmpq %rsi, %rdi
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; CHECK-NEXT: cmovbq %rdi, %rsi
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; CHECK-NEXT: movq %rsi, %rax
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%1 = icmp ult i64 %a, %b
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%2 = select i1 %1, i64 %a, i64 %b
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ret i64 %2
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}
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