llvm-6502/test/CodeGen/X86/licm-dominance.ll
Tim Northover 15983b80a0 X86: use sub-register sequences for MOV*r0 operations
Instead of having a bunch of separate MOV8r0, MOV16r0, ... pseudo-instructions,
it's better to use a single MOV32r0 (which will expand to "xorl %reg, %reg")
and obtain other sizes with EXTRACT_SUBREG and SUBREG_TO_REG. The encoding is
smaller and partial register updates can sometimes be avoided.

Until recently, this sequence was a barrier to rematerialization though. That
should now be fixed so it's an appropriate time to make the change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182928 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-30 13:19:42 +00:00

37 lines
1.2 KiB
LLVM

; RUN: llc -asm-verbose=true < %s | FileCheck %s
; MachineLICM should check dominance before hoisting instructions.
; CHECK: ## in Loop:
; CHECK-NEXT: xorl %eax, %eax
; CHECK-NEXT: testb %al, %al
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.2"
define void @CMSColorWorldCreateParametricData() nounwind uwtable optsize ssp {
entry:
br label %for.body.i
for.body.i:
br i1 undef, label %for.inc.i, label %if.then26.i
if.then26.i:
br i1 undef, label %if.else.i.i, label %lor.lhs.false.i.i
if.else.i.i:
br i1 undef, label %lor.lhs.false.i.i, label %if.then116.i.i
lor.lhs.false.i.i:
br i1 undef, label %for.inc.i, label %if.then116.i.i
if.then116.i.i:
unreachable
for.inc.i:
%cmp17.i = icmp ult i64 undef, undef
br i1 %cmp17.i, label %for.body.i, label %if.end28.i
if.end28.i:
ret void
}