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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
920 B
LLVM
31 lines
920 B
LLVM
; RUN: llc < %s -march=x86 | FileCheck %s
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; When doing sign extension, use the sext-load lowering to take advantage of
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; x86's sign extension during loads.
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;
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; CHECK-LABEL: test1:
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; CHECK: movsbl {{.*}}, %eax
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; CHECK-NEXT: ret
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define i32 @test1(i32 %X) nounwind {
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entry:
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%tmp12 = trunc i32 %X to i8 ; <i8> [#uses=1]
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%tmp123 = sext i8 %tmp12 to i32 ; <i32> [#uses=1]
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ret i32 %tmp123
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}
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; When using a sextload representation, ensure that the sign extension is
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; preserved even when removing shifted-out low bits.
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;
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; CHECK-LABEL: test2:
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; CHECK: movswl {{.*}}, %eax
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; CHECK-NEXT: ret
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define i32 @test2({i16, [6 x i8]}* %this) {
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entry:
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%b48 = getelementptr inbounds { i16, [6 x i8] }, { i16, [6 x i8] }* %this, i32 0, i32 1
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%cast = bitcast [6 x i8]* %b48 to i48*
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%bf.load = load i48, i48* %cast, align 2
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%bf.ashr = ashr i48 %bf.load, 32
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%bf.cast = trunc i48 %bf.ashr to i32
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ret i32 %bf.cast
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}
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