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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
80 lines
1.7 KiB
LLVM
80 lines
1.7 KiB
LLVM
; RUN: llc < %s -march=x86-64 -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
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;CHECK-LABEL: load_2_i8:
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; A single 16-bit load
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;CHECK: pmovzxbq
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;CHECK: paddq
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;CHECK: pshufb
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; A single 16-bit store
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;CHECK: movw
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;CHECK: ret
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define void @load_2_i8(<2 x i8>* %A) {
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%T = load <2 x i8>, <2 x i8>* %A
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%G = add <2 x i8> %T, <i8 9, i8 7>
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store <2 x i8> %G, <2 x i8>* %A
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ret void
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}
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;CHECK-LABEL: load_2_i16:
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; Read 32-bits
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;CHECK: pmovzxwq
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;CHECK: paddq
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;CHECK: pshufd
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;CHECK: movd
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;CHECK: ret
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define void @load_2_i16(<2 x i16>* %A) {
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%T = load <2 x i16>, <2 x i16>* %A
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%G = add <2 x i16> %T, <i16 9, i16 7>
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store <2 x i16> %G, <2 x i16>* %A
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ret void
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}
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;CHECK-LABEL: load_2_i32:
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;CHECK: pmovzxdq
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;CHECK: paddd
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;CHECK: pshufd
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;CHECK: ret
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define void @load_2_i32(<2 x i32>* %A) {
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%T = load <2 x i32>, <2 x i32>* %A
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%G = add <2 x i32> %T, <i32 9, i32 7>
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store <2 x i32> %G, <2 x i32>* %A
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ret void
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}
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;CHECK-LABEL: load_4_i8:
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;CHECK: pmovzxbd
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;CHECK: paddd
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;CHECK: pshufb
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;CHECK: ret
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define void @load_4_i8(<4 x i8>* %A) {
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%T = load <4 x i8>, <4 x i8>* %A
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%G = add <4 x i8> %T, <i8 1, i8 4, i8 9, i8 7>
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store <4 x i8> %G, <4 x i8>* %A
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ret void
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}
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;CHECK-LABEL: load_4_i16:
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;CHECK: pmovzxwd
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;CHECK: paddw
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;CHECK: pshufb
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;CHECK: ret
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define void @load_4_i16(<4 x i16>* %A) {
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%T = load <4 x i16>, <4 x i16>* %A
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%G = add <4 x i16> %T, <i16 1, i16 4, i16 9, i16 7>
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store <4 x i16> %G, <4 x i16>* %A
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ret void
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}
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;CHECK-LABEL: load_8_i8:
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;CHECK: pmovzxbw
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;CHECK: paddb
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;CHECK: pshufb
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;CHECK: ret
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define void @load_8_i8(<8 x i8>* %A) {
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%T = load <8 x i8>, <8 x i8>* %A
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%G = add <8 x i8> %T, %T
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store <8 x i8> %G, <8 x i8>* %A
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ret void
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}
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