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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
36 lines
1.9 KiB
LLVM
36 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s
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@e = global [8 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8], align 16
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@d = global [8 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1], align 16
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; The global 'e' has 16 byte alignment, so make sure we don't generate an
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; aligned 32-byte load instruction when we combine the load+insert sequence.
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define i32 @subb() nounwind ssp {
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; CHECK-LABEL: subb:
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; CHECK: vmovups e(%rip), %ymm
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entry:
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%0 = load i32, i32* getelementptr inbounds ([8 x i32]* @e, i64 0, i64 7), align 4
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%1 = load i32, i32* getelementptr inbounds ([8 x i32]* @e, i64 0, i64 6), align 8
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%2 = load i32, i32* getelementptr inbounds ([8 x i32]* @e, i64 0, i64 5), align 4
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%3 = load i32, i32* getelementptr inbounds ([8 x i32]* @e, i64 0, i64 4), align 16
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%4 = load i32, i32* getelementptr inbounds ([8 x i32]* @e, i64 0, i64 3), align 4
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%5 = load i32, i32* getelementptr inbounds ([8 x i32]* @e, i64 0, i64 2), align 8
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%6 = load i32, i32* getelementptr inbounds ([8 x i32]* @e, i64 0, i64 1), align 4
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%7 = load i32, i32* getelementptr inbounds ([8 x i32]* @e, i64 0, i64 0), align 16
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%vecinit.i = insertelement <8 x i32> undef, i32 %7, i32 0
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%vecinit1.i = insertelement <8 x i32> %vecinit.i, i32 %6, i32 1
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%vecinit2.i = insertelement <8 x i32> %vecinit1.i, i32 %5, i32 2
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%vecinit3.i = insertelement <8 x i32> %vecinit2.i, i32 %4, i32 3
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%vecinit4.i = insertelement <8 x i32> %vecinit3.i, i32 %3, i32 4
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%vecinit5.i = insertelement <8 x i32> %vecinit4.i, i32 %2, i32 5
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%vecinit6.i = insertelement <8 x i32> %vecinit5.i, i32 %1, i32 6
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%vecinit7.i = insertelement <8 x i32> %vecinit6.i, i32 %0, i32 7
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%8 = bitcast <8 x i32> %vecinit7.i to <32 x i8>
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tail call void @llvm.x86.avx.storeu.dq.256(i8* bitcast ([8 x i32]* @d to i8*), <32 x i8> %8)
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ret i32 0
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}
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declare void @llvm.x86.avx.storeu.dq.256(i8*, <32 x i8>) nounwind
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