llvm-6502/test/CodeGen/X86/vec_trunc_sext.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

31 lines
1.1 KiB
LLVM

; RUN: llc %s -mtriple=x86_64-unknown-unknown -mattr='-sse4.1' -o - | FileCheck %s -check-prefix=NO_SSE_41
; RUN: llc %s -mtriple=x86_64-unknown-unknown -mattr='+sse4.1' -o - | FileCheck %s -check-prefix=SSE_41
; PR20472 ( http://llvm.org/bugs/show_bug.cgi?id=20472 )
; When sexting a trunc'd vector value, we can't eliminate the zext.
; If we don't have SSE4.1, use punpck.
; If we have SSE4.1, use pmovzx because it combines the load op.
; There may be a better way to do this using pshufb + pmovsx,
; but that is beyond our current codegen capabilities.
define <4 x i32> @trunc_sext(<4 x i16>* %in) {
%load = load <4 x i16>, <4 x i16>* %in
%trunc = trunc <4 x i16> %load to <4 x i8>
%sext = sext <4 x i8> %trunc to <4 x i32>
ret <4 x i32> %sext
; NO_SSE_41-LABEL: trunc_sext:
; NO_SSE_41: movq (%rdi), %xmm0
; NO_SSE_41-NEXT: punpcklwd %xmm0, %xmm0
; NO_SSE_41-NEXT: pslld $24, %xmm0
; NO_SSE_41-NEXT: psrad $24, %xmm0
; NO_SSE_41-NEXT: retq
; SSE_41-LABEL: trunc_sext:
; SSE_41: pmovzxwd (%rdi), %xmm0
; SSE_41-NEXT: pslld $24, %xmm0
; SSE_41-NEXT: psrad $24, %xmm0
; SSE_41-NEXT: retq
}