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d345395ec9
- split WidenVecRes_Binary into WidenVecRes_Binary and WidenVecRes_BinaryCanTrap
- WidenVecRes_BinaryCanTrap preserves the original behaviour for operations
that can trap
- WidenVecRes_Binary simply widens the operation and improves codegen for
3-element vectors by allowing widening and promotion on x86 (matches the
behaviour of unary and ternary operation widening)
- use WidenVecRes_Binary for operations on integers.
Reviewed by: nrotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188699 91177308-0d34-0410-b5e6-96231b3b80d8
26 lines
775 B
LLVM
26 lines
775 B
LLVM
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s
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define void @t0(<2 x i64>* %dst, <2 x i64> %src1, <2 x i64> %src2) nounwind readonly {
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; CHECK: t0
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; CHECK: pand
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; CHECK: ret
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%cmp1 = icmp ne <2 x i64> %src1, zeroinitializer
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%cmp2 = icmp ne <2 x i64> %src2, zeroinitializer
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%t1 = and <2 x i1> %cmp1, %cmp2
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%t2 = sext <2 x i1> %t1 to <2 x i64>
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store <2 x i64> %t2, <2 x i64>* %dst
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ret void
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}
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define void @t2(<3 x i64>* %dst, <3 x i64> %src1, <3 x i64> %src2) nounwind readonly {
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; CHECK: t2
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; CHECK: pand
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; CHECK: ret
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%cmp1 = icmp ne <3 x i64> %src1, zeroinitializer
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%cmp2 = icmp ne <3 x i64> %src2, zeroinitializer
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%t1 = and <3 x i1> %cmp1, %cmp2
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%t2 = sext <3 x i1> %t1 to <3 x i64>
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store <3 x i64> %t2, <3 x i64>* %dst
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ret void
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}
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