Hal Finkel 341223ee0a [PowerPC] Don't hard-code R2 as register when processing TOC relocations ... Instructions that have high-order TOC relocations always carry R2 as their base register, so it does not matter whether we take the register from the instruction or just hard-code it in PPCAsmPrinter. In the future, however, we might want to apply these relocations to instructions using a different register, so taking the register from the instruction is a better thing to do. No change in functionality here, however. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226403 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-18 15:59:44 +00:00
..
Analysis	[PM] Now that LoopInfo isn't in the Pass type hierarchy, it is much	2015-01-18 01:25:51 +00:00
AsmParser	Remove std::move that was preventing return value optimization.	2015-01-17 00:46:44 +00:00
Bitcode	Revert r226242 - Revert Revert Don't create new comdats in CodeGen	2015-01-16 08:38:45 +00:00
CodeGen	Improve DAG combine pass on certain IR vector patterns	2015-01-17 01:35:56 +00:00
DebugInfo
ExecutionEngine	[RuntimeDyld] Tidy up emitCommonSymbols a little. NFC.	2015-01-17 00:55:05 +00:00
IR	clang-format all the GC related files (NFC)	2015-01-16 23:16:12 +00:00
IRReader
LineEditor
Linker
LTO
MC
Object	Fix the Archive::Child::getRawSize() method used by llvm-objdump’s -archive-headers option	2015-01-16 22:10:36 +00:00
Option
ProfileData
Support	Remove std::move that was preventing return value optimization.	2015-01-17 00:46:44 +00:00
TableGen
Target	[PowerPC] Don't hard-code R2 as register when processing TOC relocations	2015-01-18 15:59:44 +00:00
Transforms	[PM] Pull the analyses used for another utility routine into its API	2015-01-18 09:21:15 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile