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b06c540f9f
No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170923 91177308-0d34-0410-b5e6-96231b3b80d8
715 lines
21 KiB
C++
715 lines
21 KiB
C++
//===-- AMDGPUStructurizeCFG.cpp - ------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file
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/// The pass implemented in this file transforms the programs control flow
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/// graph into a form that's suitable for code generation on hardware that
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/// implements control flow by execution masking. This currently includes all
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/// AMD GPUs but may as well be useful for other types of hardware.
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//
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//===----------------------------------------------------------------------===//
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#include "AMDGPU.h"
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#include "llvm/Module.h"
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#include "llvm/ADT/SCCIterator.h"
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#include "llvm/Analysis/RegionIterator.h"
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#include "llvm/Analysis/RegionInfo.h"
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#include "llvm/Analysis/RegionPass.h"
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#include "llvm/Transforms/Utils/SSAUpdater.h"
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using namespace llvm;
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namespace {
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// Definition of the complex types used in this pass.
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typedef std::pair<BasicBlock *, Value *> BBValuePair;
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typedef ArrayRef<BasicBlock*> BBVecRef;
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typedef SmallVector<RegionNode*, 8> RNVector;
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typedef SmallVector<BasicBlock*, 8> BBVector;
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typedef SmallVector<BBValuePair, 2> BBValueVector;
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typedef DenseMap<PHINode *, BBValueVector> PhiMap;
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typedef DenseMap<BasicBlock *, PhiMap> BBPhiMap;
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typedef DenseMap<BasicBlock *, Value *> BBPredicates;
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typedef DenseMap<BasicBlock *, BBPredicates> PredMap;
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typedef DenseMap<BasicBlock *, unsigned> VisitedMap;
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// The name for newly created blocks.
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static const char *FlowBlockName = "Flow";
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/// @brief Transforms the control flow graph on one single entry/exit region
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/// at a time.
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///
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/// After the transform all "If"/"Then"/"Else" style control flow looks like
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/// this:
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///
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/// \verbatim
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/// 1
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/// ||
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/// | |
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/// 2 |
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/// | /
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/// |/
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/// 3
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/// || Where:
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/// | | 1 = "If" block, calculates the condition
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/// 4 | 2 = "Then" subregion, runs if the condition is true
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/// | / 3 = "Flow" blocks, newly inserted flow blocks, rejoins the flow
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/// |/ 4 = "Else" optional subregion, runs if the condition is false
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/// 5 5 = "End" block, also rejoins the control flow
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/// \endverbatim
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///
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/// Control flow is expressed as a branch where the true exit goes into the
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/// "Then"/"Else" region, while the false exit skips the region
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/// The condition for the optional "Else" region is expressed as a PHI node.
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/// The incomming values of the PHI node are true for the "If" edge and false
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/// for the "Then" edge.
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///
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/// Additionally to that even complicated loops look like this:
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///
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/// \verbatim
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/// 1
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/// ||
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/// | |
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/// 2 ^ Where:
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/// | / 1 = "Entry" block
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/// |/ 2 = "Loop" optional subregion, with all exits at "Flow" block
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/// 3 3 = "Flow" block, with back edge to entry block
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/// |
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/// \endverbatim
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///
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/// The back edge of the "Flow" block is always on the false side of the branch
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/// while the true side continues the general flow. So the loop condition
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/// consist of a network of PHI nodes where the true incoming values expresses
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/// breaks and the false values expresses continue states.
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class AMDGPUStructurizeCFG : public RegionPass {
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static char ID;
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Type *Boolean;
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ConstantInt *BoolTrue;
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ConstantInt *BoolFalse;
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UndefValue *BoolUndef;
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Function *Func;
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Region *ParentRegion;
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DominatorTree *DT;
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RNVector Order;
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VisitedMap Visited;
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PredMap Predicates;
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BBPhiMap DeletedPhis;
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BBVector FlowsInserted;
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BasicBlock *LoopStart;
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BasicBlock *LoopEnd;
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BBPredicates LoopPred;
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void orderNodes();
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void buildPredicate(BranchInst *Term, unsigned Idx,
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BBPredicates &Pred, bool Invert);
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void analyzeBlock(BasicBlock *BB);
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void analyzeLoop(BasicBlock *BB, unsigned &LoopIdx);
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void collectInfos();
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bool dominatesPredicates(BasicBlock *A, BasicBlock *B);
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void killTerminator(BasicBlock *BB);
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RegionNode *skipChained(RegionNode *Node);
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void delPhiValues(BasicBlock *From, BasicBlock *To);
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void addPhiValues(BasicBlock *From, BasicBlock *To);
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BasicBlock *getNextFlow(BasicBlock *Prev);
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bool isPredictableTrue(BasicBlock *Prev, BasicBlock *Node);
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BasicBlock *wireFlowBlock(BasicBlock *Prev, RegionNode *Node);
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void createFlow();
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void insertConditions();
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void rebuildSSA();
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public:
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AMDGPUStructurizeCFG():
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RegionPass(ID) {
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initializeRegionInfoPass(*PassRegistry::getPassRegistry());
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}
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virtual bool doInitialization(Region *R, RGPassManager &RGM);
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virtual bool runOnRegion(Region *R, RGPassManager &RGM);
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virtual const char *getPassName() const {
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return "AMDGPU simplify control flow";
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}
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<DominatorTree>();
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AU.addPreserved<DominatorTree>();
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RegionPass::getAnalysisUsage(AU);
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}
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};
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} // end anonymous namespace
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char AMDGPUStructurizeCFG::ID = 0;
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/// \brief Initialize the types and constants used in the pass
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bool AMDGPUStructurizeCFG::doInitialization(Region *R, RGPassManager &RGM) {
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LLVMContext &Context = R->getEntry()->getContext();
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Boolean = Type::getInt1Ty(Context);
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BoolTrue = ConstantInt::getTrue(Context);
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BoolFalse = ConstantInt::getFalse(Context);
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BoolUndef = UndefValue::get(Boolean);
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return false;
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}
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/// \brief Build up the general order of nodes
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void AMDGPUStructurizeCFG::orderNodes() {
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scc_iterator<Region *> I = scc_begin(ParentRegion),
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E = scc_end(ParentRegion);
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for (Order.clear(); I != E; ++I) {
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std::vector<RegionNode *> &Nodes = *I;
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Order.append(Nodes.begin(), Nodes.end());
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}
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}
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/// \brief Build blocks and loop predicates
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void AMDGPUStructurizeCFG::buildPredicate(BranchInst *Term, unsigned Idx,
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BBPredicates &Pred, bool Invert) {
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Value *True = Invert ? BoolFalse : BoolTrue;
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Value *False = Invert ? BoolTrue : BoolFalse;
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RegionInfo *RI = ParentRegion->getRegionInfo();
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BasicBlock *BB = Term->getParent();
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// Handle the case where multiple regions start at the same block
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Region *R = BB != ParentRegion->getEntry() ?
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RI->getRegionFor(BB) : ParentRegion;
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if (R == ParentRegion) {
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// It's a top level block in our region
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Value *Cond = True;
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if (Term->isConditional()) {
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BasicBlock *Other = Term->getSuccessor(!Idx);
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if (Visited.count(Other)) {
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if (!Pred.count(Other))
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Pred[Other] = False;
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if (!Pred.count(BB))
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Pred[BB] = True;
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return;
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}
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Cond = Term->getCondition();
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if (Idx != Invert)
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Cond = BinaryOperator::CreateNot(Cond, "", Term);
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}
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Pred[BB] = Cond;
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} else if (ParentRegion->contains(R)) {
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// It's a block in a sub region
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while(R->getParent() != ParentRegion)
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R = R->getParent();
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Pred[R->getEntry()] = True;
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} else {
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// It's a branch from outside into our parent region
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Pred[BB] = True;
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}
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}
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/// \brief Analyze the successors of each block and build up predicates
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void AMDGPUStructurizeCFG::analyzeBlock(BasicBlock *BB) {
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pred_iterator PI = pred_begin(BB), PE = pred_end(BB);
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BBPredicates &Pred = Predicates[BB];
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for (; PI != PE; ++PI) {
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BranchInst *Term = cast<BranchInst>((*PI)->getTerminator());
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for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
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BasicBlock *Succ = Term->getSuccessor(i);
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if (Succ != BB)
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continue;
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buildPredicate(Term, i, Pred, false);
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}
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}
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}
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/// \brief Analyze the conditions leading to loop to a previous block
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void AMDGPUStructurizeCFG::analyzeLoop(BasicBlock *BB, unsigned &LoopIdx) {
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BranchInst *Term = cast<BranchInst>(BB->getTerminator());
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for (unsigned i = 0, e = Term->getNumSuccessors(); i != e; ++i) {
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BasicBlock *Succ = Term->getSuccessor(i);
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// Ignore it if it's not a back edge
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if (!Visited.count(Succ))
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continue;
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buildPredicate(Term, i, LoopPred, true);
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LoopEnd = BB;
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if (Visited[Succ] < LoopIdx) {
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LoopIdx = Visited[Succ];
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LoopStart = Succ;
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}
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}
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}
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/// \brief Collect various loop and predicate infos
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void AMDGPUStructurizeCFG::collectInfos() {
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unsigned Number = 0, LoopIdx = ~0;
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// Reset predicate
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Predicates.clear();
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// and loop infos
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LoopStart = LoopEnd = 0;
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LoopPred.clear();
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RNVector::reverse_iterator OI = Order.rbegin(), OE = Order.rend();
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for (Visited.clear(); OI != OE; Visited[(*OI++)->getEntry()] = ++Number) {
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// Analyze all the conditions leading to a node
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analyzeBlock((*OI)->getEntry());
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if ((*OI)->isSubRegion())
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continue;
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// Find the first/last loop nodes and loop predicates
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analyzeLoop((*OI)->getNodeAs<BasicBlock>(), LoopIdx);
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}
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}
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/// \brief Does A dominate all the predicates of B ?
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bool AMDGPUStructurizeCFG::dominatesPredicates(BasicBlock *A, BasicBlock *B) {
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BBPredicates &Preds = Predicates[B];
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for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
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PI != PE; ++PI) {
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if (!DT->dominates(A, PI->first))
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return false;
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}
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return true;
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}
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/// \brief Remove phi values from all successors and the remove the terminator.
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void AMDGPUStructurizeCFG::killTerminator(BasicBlock *BB) {
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TerminatorInst *Term = BB->getTerminator();
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if (!Term)
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return;
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for (succ_iterator SI = succ_begin(BB), SE = succ_end(BB);
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SI != SE; ++SI) {
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delPhiValues(BB, *SI);
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}
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Term->eraseFromParent();
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}
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/// First: Skip forward to the first region node that either isn't a subregion or not
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/// dominating it's exit, remove all the skipped nodes from the node order.
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///
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/// Second: Handle the first successor directly if the resulting nodes successor
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/// predicates are still dominated by the original entry
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RegionNode *AMDGPUStructurizeCFG::skipChained(RegionNode *Node) {
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BasicBlock *Entry = Node->getEntry();
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// Skip forward as long as it is just a linear flow
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while (true) {
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BasicBlock *Entry = Node->getEntry();
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BasicBlock *Exit;
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if (Node->isSubRegion()) {
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Exit = Node->getNodeAs<Region>()->getExit();
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} else {
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TerminatorInst *Term = Entry->getTerminator();
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if (Term->getNumSuccessors() != 1)
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break;
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Exit = Term->getSuccessor(0);
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}
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// It's a back edge, break here so we can insert a loop node
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if (!Visited.count(Exit))
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return Node;
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// More than node edges are pointing to exit
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if (!DT->dominates(Entry, Exit))
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return Node;
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RegionNode *Next = ParentRegion->getNode(Exit);
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RNVector::iterator I = std::find(Order.begin(), Order.end(), Next);
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assert(I != Order.end());
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Visited.erase(Next->getEntry());
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Order.erase(I);
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Node = Next;
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}
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BasicBlock *BB = Node->getEntry();
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TerminatorInst *Term = BB->getTerminator();
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if (Term->getNumSuccessors() != 2)
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return Node;
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// Our node has exactly two succesors, check if we can handle
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// any of them directly
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BasicBlock *Succ = Term->getSuccessor(0);
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if (!Visited.count(Succ) || !dominatesPredicates(Entry, Succ)) {
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Succ = Term->getSuccessor(1);
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if (!Visited.count(Succ) || !dominatesPredicates(Entry, Succ))
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return Node;
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} else {
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BasicBlock *Succ2 = Term->getSuccessor(1);
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if (Visited.count(Succ2) && Visited[Succ] > Visited[Succ2] &&
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dominatesPredicates(Entry, Succ2))
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Succ = Succ2;
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}
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RegionNode *Next = ParentRegion->getNode(Succ);
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RNVector::iterator E = Order.end();
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RNVector::iterator I = std::find(Order.begin(), E, Next);
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assert(I != E);
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killTerminator(BB);
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FlowsInserted.push_back(BB);
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Visited.erase(Succ);
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Order.erase(I);
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return ParentRegion->getNode(wireFlowBlock(BB, Next));
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}
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/// \brief Remove all PHI values coming from "From" into "To" and remember
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/// them in DeletedPhis
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void AMDGPUStructurizeCFG::delPhiValues(BasicBlock *From, BasicBlock *To) {
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PhiMap &Map = DeletedPhis[To];
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for (BasicBlock::iterator I = To->begin(), E = To->end();
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I != E && isa<PHINode>(*I);) {
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PHINode &Phi = cast<PHINode>(*I++);
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while (Phi.getBasicBlockIndex(From) != -1) {
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Value *Deleted = Phi.removeIncomingValue(From, false);
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Map[&Phi].push_back(std::make_pair(From, Deleted));
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}
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}
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}
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/// \brief Add the PHI values back once we knew the new predecessor
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void AMDGPUStructurizeCFG::addPhiValues(BasicBlock *From, BasicBlock *To) {
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if (!DeletedPhis.count(To))
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return;
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PhiMap &Map = DeletedPhis[To];
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SSAUpdater Updater;
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for (PhiMap::iterator I = Map.begin(), E = Map.end(); I != E; ++I) {
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PHINode *Phi = I->first;
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Updater.Initialize(Phi->getType(), "");
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BasicBlock *Fallback = To;
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bool HaveFallback = false;
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for (BBValueVector::iterator VI = I->second.begin(), VE = I->second.end();
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VI != VE; ++VI) {
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Updater.AddAvailableValue(VI->first, VI->second);
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BasicBlock *Dom = DT->findNearestCommonDominator(Fallback, VI->first);
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if (Dom == VI->first)
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HaveFallback = true;
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else if (Dom != Fallback)
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HaveFallback = false;
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Fallback = Dom;
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}
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if (!HaveFallback) {
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Value *Undef = UndefValue::get(Phi->getType());
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Updater.AddAvailableValue(Fallback, Undef);
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}
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Phi->addIncoming(Updater.GetValueAtEndOfBlock(From), From);
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}
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DeletedPhis.erase(To);
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}
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/// \brief Create a new flow node and update dominator tree and region info
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BasicBlock *AMDGPUStructurizeCFG::getNextFlow(BasicBlock *Prev) {
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LLVMContext &Context = Func->getContext();
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BasicBlock *Insert = Order.empty() ? ParentRegion->getExit() :
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Order.back()->getEntry();
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BasicBlock *Flow = BasicBlock::Create(Context, FlowBlockName,
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Func, Insert);
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DT->addNewBlock(Flow, Prev);
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ParentRegion->getRegionInfo()->setRegionFor(Flow, ParentRegion);
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FlowsInserted.push_back(Flow);
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return Flow;
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}
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/// \brief Can we predict that this node will always be called?
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bool AMDGPUStructurizeCFG::isPredictableTrue(BasicBlock *Prev,
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BasicBlock *Node) {
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BBPredicates &Preds = Predicates[Node];
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bool Dominated = false;
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for (BBPredicates::iterator I = Preds.begin(), E = Preds.end();
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I != E; ++I) {
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if (I->second != BoolTrue)
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return false;
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if (!Dominated && DT->dominates(I->first, Prev))
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Dominated = true;
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}
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return Dominated;
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}
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/// \brief Wire up the new control flow by inserting or updating the branch
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/// instructions at node exits
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BasicBlock *AMDGPUStructurizeCFG::wireFlowBlock(BasicBlock *Prev,
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RegionNode *Node) {
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BasicBlock *Entry = Node->getEntry();
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if (LoopStart == Entry) {
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LoopStart = Prev;
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LoopPred[Prev] = BoolTrue;
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}
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// Wire it up temporary, skipChained may recurse into us
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BranchInst::Create(Entry, Prev);
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DT->changeImmediateDominator(Entry, Prev);
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addPhiValues(Prev, Entry);
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Node = skipChained(Node);
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BasicBlock *Next = getNextFlow(Prev);
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if (!isPredictableTrue(Prev, Entry)) {
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// Let Prev point to entry and next block
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Prev->getTerminator()->eraseFromParent();
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BranchInst::Create(Entry, Next, BoolUndef, Prev);
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} else {
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DT->changeImmediateDominator(Next, Entry);
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}
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// Let node exit(s) point to next block
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if (Node->isSubRegion()) {
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Region *SubRegion = Node->getNodeAs<Region>();
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BasicBlock *Exit = SubRegion->getExit();
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// Find all the edges from the sub region to the exit
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BBVector ToDo;
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for (pred_iterator I = pred_begin(Exit), E = pred_end(Exit); I != E; ++I) {
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if (SubRegion->contains(*I))
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ToDo.push_back(*I);
|
|
}
|
|
|
|
// Modify the edges to point to the new flow block
|
|
for (BBVector::iterator I = ToDo.begin(), E = ToDo.end(); I != E; ++I) {
|
|
delPhiValues(*I, Exit);
|
|
TerminatorInst *Term = (*I)->getTerminator();
|
|
Term->replaceUsesOfWith(Exit, Next);
|
|
}
|
|
|
|
// Update the region info
|
|
SubRegion->replaceExit(Next);
|
|
|
|
} else {
|
|
BasicBlock *BB = Node->getNodeAs<BasicBlock>();
|
|
killTerminator(BB);
|
|
BranchInst::Create(Next, BB);
|
|
|
|
if (BB == LoopEnd)
|
|
LoopEnd = 0;
|
|
}
|
|
|
|
return Next;
|
|
}
|
|
|
|
/// Destroy node order and visited map, build up flow order instead.
|
|
/// After this function control flow looks like it should be, but
|
|
/// branches only have undefined conditions.
|
|
void AMDGPUStructurizeCFG::createFlow() {
|
|
DeletedPhis.clear();
|
|
|
|
BasicBlock *Prev = Order.pop_back_val()->getEntry();
|
|
assert(Prev == ParentRegion->getEntry() && "Incorrect node order!");
|
|
Visited.erase(Prev);
|
|
|
|
if (LoopStart == Prev) {
|
|
// Loop starts at entry, split entry so that we can predicate it
|
|
BasicBlock::iterator Insert = Prev->getFirstInsertionPt();
|
|
BasicBlock *Split = Prev->splitBasicBlock(Insert, FlowBlockName);
|
|
DT->addNewBlock(Split, Prev);
|
|
ParentRegion->getRegionInfo()->setRegionFor(Split, ParentRegion);
|
|
Predicates[Split] = Predicates[Prev];
|
|
Order.push_back(ParentRegion->getBBNode(Split));
|
|
LoopPred[Prev] = BoolTrue;
|
|
|
|
} else if (LoopStart == Order.back()->getEntry()) {
|
|
// Loop starts behind entry, split entry so that we can jump to it
|
|
Instruction *Term = Prev->getTerminator();
|
|
BasicBlock *Split = Prev->splitBasicBlock(Term, FlowBlockName);
|
|
DT->addNewBlock(Split, Prev);
|
|
ParentRegion->getRegionInfo()->setRegionFor(Split, ParentRegion);
|
|
Prev = Split;
|
|
}
|
|
|
|
killTerminator(Prev);
|
|
FlowsInserted.clear();
|
|
FlowsInserted.push_back(Prev);
|
|
|
|
while (!Order.empty()) {
|
|
RegionNode *Node = Order.pop_back_val();
|
|
Visited.erase(Node->getEntry());
|
|
Prev = wireFlowBlock(Prev, Node);
|
|
if (LoopStart && !LoopEnd) {
|
|
// Create an extra loop end node
|
|
LoopEnd = Prev;
|
|
Prev = getNextFlow(LoopEnd);
|
|
BranchInst::Create(Prev, LoopStart, BoolUndef, LoopEnd);
|
|
addPhiValues(LoopEnd, LoopStart);
|
|
}
|
|
}
|
|
|
|
BasicBlock *Exit = ParentRegion->getExit();
|
|
BranchInst::Create(Exit, Prev);
|
|
addPhiValues(Prev, Exit);
|
|
if (DT->dominates(ParentRegion->getEntry(), Exit))
|
|
DT->changeImmediateDominator(Exit, Prev);
|
|
|
|
if (LoopStart && LoopEnd) {
|
|
BBVector::iterator FI = std::find(FlowsInserted.begin(),
|
|
FlowsInserted.end(),
|
|
LoopStart);
|
|
for (; *FI != LoopEnd; ++FI) {
|
|
addPhiValues(*FI, (*FI)->getTerminator()->getSuccessor(0));
|
|
}
|
|
}
|
|
|
|
assert(Order.empty());
|
|
assert(Visited.empty());
|
|
assert(DeletedPhis.empty());
|
|
}
|
|
|
|
/// \brief Insert the missing branch conditions
|
|
void AMDGPUStructurizeCFG::insertConditions() {
|
|
SSAUpdater PhiInserter;
|
|
|
|
for (BBVector::iterator FI = FlowsInserted.begin(), FE = FlowsInserted.end();
|
|
FI != FE; ++FI) {
|
|
|
|
BranchInst *Term = cast<BranchInst>((*FI)->getTerminator());
|
|
if (Term->isUnconditional())
|
|
continue;
|
|
|
|
PhiInserter.Initialize(Boolean, "");
|
|
PhiInserter.AddAvailableValue(&Func->getEntryBlock(), BoolFalse);
|
|
|
|
BasicBlock *Succ = Term->getSuccessor(0);
|
|
BBPredicates &Preds = (*FI == LoopEnd) ? LoopPred : Predicates[Succ];
|
|
for (BBPredicates::iterator PI = Preds.begin(), PE = Preds.end();
|
|
PI != PE; ++PI) {
|
|
|
|
PhiInserter.AddAvailableValue(PI->first, PI->second);
|
|
}
|
|
|
|
Term->setCondition(PhiInserter.GetValueAtEndOfBlock(*FI));
|
|
}
|
|
}
|
|
|
|
/// Handle a rare case where the disintegrated nodes instructions
|
|
/// no longer dominate all their uses. Not sure if this is really nessasary
|
|
void AMDGPUStructurizeCFG::rebuildSSA() {
|
|
SSAUpdater Updater;
|
|
for (Region::block_iterator I = ParentRegion->block_begin(),
|
|
E = ParentRegion->block_end();
|
|
I != E; ++I) {
|
|
|
|
BasicBlock *BB = *I;
|
|
for (BasicBlock::iterator II = BB->begin(), IE = BB->end();
|
|
II != IE; ++II) {
|
|
|
|
bool Initialized = false;
|
|
for (Use *I = &II->use_begin().getUse(), *Next; I; I = Next) {
|
|
|
|
Next = I->getNext();
|
|
|
|
Instruction *User = cast<Instruction>(I->getUser());
|
|
if (User->getParent() == BB) {
|
|
continue;
|
|
|
|
} else if (PHINode *UserPN = dyn_cast<PHINode>(User)) {
|
|
if (UserPN->getIncomingBlock(*I) == BB)
|
|
continue;
|
|
}
|
|
|
|
if (DT->dominates(II, User))
|
|
continue;
|
|
|
|
if (!Initialized) {
|
|
Value *Undef = UndefValue::get(II->getType());
|
|
Updater.Initialize(II->getType(), "");
|
|
Updater.AddAvailableValue(&Func->getEntryBlock(), Undef);
|
|
Updater.AddAvailableValue(BB, II);
|
|
Initialized = true;
|
|
}
|
|
Updater.RewriteUseAfterInsertions(*I);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/// \brief Run the transformation for each region found
|
|
bool AMDGPUStructurizeCFG::runOnRegion(Region *R, RGPassManager &RGM) {
|
|
if (R->isTopLevelRegion())
|
|
return false;
|
|
|
|
Func = R->getEntry()->getParent();
|
|
ParentRegion = R;
|
|
|
|
DT = &getAnalysis<DominatorTree>();
|
|
|
|
orderNodes();
|
|
collectInfos();
|
|
createFlow();
|
|
insertConditions();
|
|
rebuildSSA();
|
|
|
|
Order.clear();
|
|
Visited.clear();
|
|
Predicates.clear();
|
|
DeletedPhis.clear();
|
|
FlowsInserted.clear();
|
|
|
|
return true;
|
|
}
|
|
|
|
/// \brief Create the pass
|
|
Pass *llvm::createAMDGPUStructurizeCFGPass() {
|
|
return new AMDGPUStructurizeCFG();
|
|
}
|