llvm-6502/lib/Target
Chris Lattner 97220b7338 In the perhaps not-to-distant future, we might support gep instructions that
have non-long indices for sequential types.  In order to avoid trying to figure
out how the v9 backend works, we'll just hack it in the preselection pass.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@12647 91177308-0d34-0410-b5e6-96231b3b80d8
2004-04-04 20:44:05 +00:00
..
CBackend Add support for select constant expressions to the CBE, fixing SIOD 2004-04-01 05:28:26 +00:00
PowerPC fine grainify namespacification 2004-02-28 19:53:18 +00:00
Sparc Add support for many of the MRegisterInfo callbacks. 2004-04-02 20:53:37 +00:00
SparcV8 Add support for many of the MRegisterInfo callbacks. 2004-04-02 20:53:37 +00:00
SparcV9 In the perhaps not-to-distant future, we might support gep instructions that 2004-04-04 20:44:05 +00:00
X86 Clean up code a bit. 2004-04-02 18:11:32 +00:00
Makefile Remove ghostly directory from the build 2004-03-11 04:42:41 +00:00
MRegisterInfo.cpp
Target.td Expose the "Other" value type to tablegen targets 2004-02-11 03:08:45 +00:00
TargetData.cpp Use a map instead of annotations 2004-02-26 08:02:17 +00:00
TargetFrameInfo.cpp Move implementations of functions here, which avoids #including <cstdlib> in the 2004-03-11 23:52:43 +00:00
TargetInstrInfo.cpp Adjust to change in TII ctor arguments 2004-02-29 06:31:44 +00:00
TargetMachine.cpp make -print-machineinstrs work for both SparcV9 and X86 2004-03-04 19:16:23 +00:00
TargetSchedInfo.cpp Eliminate the distinction between "real" and "unreal" instructions 2004-02-29 06:31:16 +00:00