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https://github.com/c64scene-ar/llvm-6502.git
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c01d1232fe
* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an extra copy into a register, reducing register pressure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@9278 91177308-0d34-0410-b5e6-96231b3b80d8
585 lines
21 KiB
C++
585 lines
21 KiB
C++
//===-- X86/X86CodeEmitter.cpp - Convert X86 code to machine code ---------===//
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//
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// This file contains the pass that transforms the X86 machine instructions into
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// actual executable machine code.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "jit"
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#include "X86TargetMachine.h"
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#include "X86.h"
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#include "llvm/PassManager.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Function.h"
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#include "Support/Debug.h"
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#include "Support/Statistic.h"
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#include "Config/alloca.h"
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namespace {
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Statistic<>
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NumEmitted("x86-emitter", "Number of machine instructions emitted");
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class JITResolver {
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MachineCodeEmitter &MCE;
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// LazyCodeGenMap - Keep track of call sites for functions that are to be
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// lazily resolved.
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std::map<unsigned, Function*> LazyCodeGenMap;
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// LazyResolverMap - Keep track of the lazy resolver created for a
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// particular function so that we can reuse them if necessary.
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std::map<Function*, unsigned> LazyResolverMap;
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public:
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JITResolver(MachineCodeEmitter &mce) : MCE(mce) {}
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unsigned getLazyResolver(Function *F);
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unsigned addFunctionReference(unsigned Address, Function *F);
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private:
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unsigned emitStubForFunction(Function *F);
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static void CompilationCallback();
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unsigned resolveFunctionReference(unsigned RetAddr);
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};
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JITResolver *TheJITResolver;
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}
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/// addFunctionReference - This method is called when we need to emit the
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/// address of a function that has not yet been emitted, so we don't know the
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/// address. Instead, we emit a call to the CompilationCallback method, and
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/// keep track of where we are.
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///
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unsigned JITResolver::addFunctionReference(unsigned Address, Function *F) {
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LazyCodeGenMap[Address] = F;
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return (intptr_t)&JITResolver::CompilationCallback;
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}
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unsigned JITResolver::resolveFunctionReference(unsigned RetAddr) {
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std::map<unsigned, Function*>::iterator I = LazyCodeGenMap.find(RetAddr);
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assert(I != LazyCodeGenMap.end() && "Not in map!");
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Function *F = I->second;
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LazyCodeGenMap.erase(I);
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return MCE.forceCompilationOf(F);
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}
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unsigned JITResolver::getLazyResolver(Function *F) {
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std::map<Function*, unsigned>::iterator I = LazyResolverMap.lower_bound(F);
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if (I != LazyResolverMap.end() && I->first == F) return I->second;
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//std::cerr << "Getting lazy resolver for : " << ((Value*)F)->getName() << "\n";
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unsigned Stub = emitStubForFunction(F);
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LazyResolverMap.insert(I, std::make_pair(F, Stub));
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return Stub;
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}
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void JITResolver::CompilationCallback() {
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unsigned *StackPtr = (unsigned*)__builtin_frame_address(0);
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unsigned RetAddr = (unsigned)(intptr_t)__builtin_return_address(0);
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assert(StackPtr[1] == RetAddr &&
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"Could not find return address on the stack!");
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// It's a stub if there is an interrupt marker after the call...
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bool isStub = ((unsigned char*)(intptr_t)RetAddr)[0] == 0xCD;
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// FIXME FIXME FIXME FIXME: __builtin_frame_address doesn't work if frame
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// pointer elimination has been performed. Having a variable sized alloca
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// disables frame pointer elimination currently, even if it's dead. This is a
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// gross hack.
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alloca(10+isStub);
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// FIXME FIXME FIXME FIXME
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// The call instruction should have pushed the return value onto the stack...
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RetAddr -= 4; // Backtrack to the reference itself...
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#if 0
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DEBUG(std::cerr << "In callback! Addr=0x" << std::hex << RetAddr
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<< " ESP=0x" << (unsigned)StackPtr << std::dec
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<< ": Resolving call to function: "
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<< TheVM->getFunctionReferencedName((void*)RetAddr) << "\n");
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#endif
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// Sanity check to make sure this really is a call instruction...
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assert(((unsigned char*)(intptr_t)RetAddr)[-1] == 0xE8 &&"Not a call instr!");
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unsigned NewVal = TheJITResolver->resolveFunctionReference(RetAddr);
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// Rewrite the call target... so that we don't fault every time we execute
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// the call.
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*(unsigned*)(intptr_t)RetAddr = NewVal-RetAddr-4;
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if (isStub) {
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// If this is a stub, rewrite the call into an unconditional branch
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// instruction so that two return addresses are not pushed onto the stack
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// when the requested function finally gets called. This also makes the
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// 0xCD byte (interrupt) dead, so the marker doesn't effect anything.
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((unsigned char*)(intptr_t)RetAddr)[-1] = 0xE9;
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}
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// Change the return address to reexecute the call instruction...
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StackPtr[1] -= 5;
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}
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/// emitStubForFunction - This method is used by the JIT when it needs to emit
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/// the address of a function for a function whose code has not yet been
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/// generated. In order to do this, it generates a stub which jumps to the lazy
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/// function compiler, which will eventually get fixed to call the function
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/// directly.
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///
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unsigned JITResolver::emitStubForFunction(Function *F) {
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MCE.startFunctionStub(*F, 6);
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MCE.emitByte(0xE8); // Call with 32 bit pc-rel destination...
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unsigned Address = addFunctionReference(MCE.getCurrentPCValue(), F);
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MCE.emitWord(Address-MCE.getCurrentPCValue()-4);
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MCE.emitByte(0xCD); // Interrupt - Just a marker identifying the stub!
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return (intptr_t)MCE.finishFunctionStub(*F);
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}
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namespace {
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class Emitter : public MachineFunctionPass {
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const X86InstrInfo *II;
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MachineCodeEmitter &MCE;
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std::map<const BasicBlock*, unsigned> BasicBlockAddrs;
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std::vector<std::pair<const BasicBlock*, unsigned> > BBRefs;
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public:
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Emitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
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bool runOnMachineFunction(MachineFunction &MF);
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virtual const char *getPassName() const {
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return "X86 Machine Code Emitter";
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}
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private:
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void emitBasicBlock(MachineBasicBlock &MBB);
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void emitInstruction(MachineInstr &MI);
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void emitPCRelativeBlockAddress(BasicBlock *BB);
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void emitMaybePCRelativeValue(unsigned Address, bool isPCRelative);
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void emitGlobalAddressForCall(GlobalValue *GV);
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void emitGlobalAddressForPtr(GlobalValue *GV);
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void emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeField);
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void emitSIBByte(unsigned SS, unsigned Index, unsigned Base);
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void emitConstant(unsigned Val, unsigned Size);
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void emitMemModRMByte(const MachineInstr &MI,
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unsigned Op, unsigned RegOpcodeField);
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};
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}
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
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/// machine code emitted. This uses a MachineCodeEmitter object to handle
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method should returns true if machine code emission is
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/// not supported.
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///
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bool X86TargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
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MachineCodeEmitter &MCE) {
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PM.add(new Emitter(MCE));
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return false;
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}
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bool Emitter::runOnMachineFunction(MachineFunction &MF) {
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II = &((X86TargetMachine&)MF.getTarget()).getInstrInfo();
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MCE.startFunction(MF);
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MCE.emitConstantPool(MF.getConstantPool());
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for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
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emitBasicBlock(*I);
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MCE.finishFunction(MF);
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// Resolve all forward branches now...
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for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
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unsigned Location = BasicBlockAddrs[BBRefs[i].first];
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unsigned Ref = BBRefs[i].second;
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*(unsigned*)(intptr_t)Ref = Location-Ref-4;
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}
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BBRefs.clear();
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BasicBlockAddrs.clear();
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return false;
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}
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void Emitter::emitBasicBlock(MachineBasicBlock &MBB) {
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if (uint64_t Addr = MCE.getCurrentPCValue())
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BasicBlockAddrs[MBB.getBasicBlock()] = Addr;
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for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I)
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emitInstruction(**I);
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}
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/// emitPCRelativeBlockAddress - This method emits the PC relative address of
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/// the specified basic block, or if the basic block hasn't been emitted yet
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/// (because this is a forward branch), it keeps track of the information
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/// necessary to resolve this address later (and emits a dummy value).
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///
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void Emitter::emitPCRelativeBlockAddress(BasicBlock *BB) {
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// FIXME: Emit backward branches directly
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BBRefs.push_back(std::make_pair(BB, MCE.getCurrentPCValue()));
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MCE.emitWord(0); // Emit a dummy value
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}
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/// emitMaybePCRelativeValue - Emit a 32-bit address which may be PC relative.
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///
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void Emitter::emitMaybePCRelativeValue(unsigned Address, bool isPCRelative) {
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if (isPCRelative)
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MCE.emitWord(Address-MCE.getCurrentPCValue()-4);
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else
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MCE.emitWord(Address);
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}
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/// emitGlobalAddressForCall - Emit the specified address to the code stream
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/// assuming this is part of a function call, which is PC relative.
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///
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void Emitter::emitGlobalAddressForCall(GlobalValue *GV) {
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// Get the address from the backend...
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unsigned Address = MCE.getGlobalValueAddress(GV);
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if (Address == 0) {
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// FIXME: this is JIT specific!
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if (TheJITResolver == 0)
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TheJITResolver = new JITResolver(MCE);
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Address = TheJITResolver->addFunctionReference(MCE.getCurrentPCValue(),
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cast<Function>(GV));
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}
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emitMaybePCRelativeValue(Address, true);
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}
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/// emitGlobalAddress - Emit the specified address to the code stream assuming
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/// this is part of a "take the address of a global" instruction, which is not
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/// PC relative.
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///
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void Emitter::emitGlobalAddressForPtr(GlobalValue *GV) {
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// Get the address from the backend...
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unsigned Address = MCE.getGlobalValueAddress(GV);
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// If the machine code emitter doesn't know what the address IS yet, we have
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// to take special measures.
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//
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if (Address == 0) {
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// FIXME: this is JIT specific!
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if (TheJITResolver == 0)
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TheJITResolver = new JITResolver(MCE);
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Address = TheJITResolver->getLazyResolver((Function*)GV);
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}
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emitMaybePCRelativeValue(Address, false);
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}
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/// N86 namespace - Native X86 Register numbers... used by X86 backend.
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///
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namespace N86 {
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enum {
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EAX = 0, ECX = 1, EDX = 2, EBX = 3, ESP = 4, EBP = 5, ESI = 6, EDI = 7
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};
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}
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// getX86RegNum - This function maps LLVM register identifiers to their X86
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// specific numbering, which is used in various places encoding instructions.
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//
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static unsigned getX86RegNum(unsigned RegNo) {
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switch(RegNo) {
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case X86::EAX: case X86::AX: case X86::AL: return N86::EAX;
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case X86::ECX: case X86::CX: case X86::CL: return N86::ECX;
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case X86::EDX: case X86::DX: case X86::DL: return N86::EDX;
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case X86::EBX: case X86::BX: case X86::BL: return N86::EBX;
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case X86::ESP: case X86::SP: case X86::AH: return N86::ESP;
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case X86::EBP: case X86::BP: case X86::CH: return N86::EBP;
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case X86::ESI: case X86::SI: case X86::DH: return N86::ESI;
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case X86::EDI: case X86::DI: case X86::BH: return N86::EDI;
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case X86::ST0: case X86::ST1: case X86::ST2: case X86::ST3:
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case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7:
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return RegNo-X86::ST0;
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default:
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assert(RegNo >= MRegisterInfo::FirstVirtualRegister &&
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"Unknown physical register!");
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assert(0 && "Register allocator hasn't allocated reg correctly yet!");
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return 0;
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}
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}
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inline static unsigned char ModRMByte(unsigned Mod, unsigned RegOpcode,
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unsigned RM) {
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assert(Mod < 4 && RegOpcode < 8 && RM < 8 && "ModRM Fields out of range!");
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return RM | (RegOpcode << 3) | (Mod << 6);
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}
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void Emitter::emitRegModRMByte(unsigned ModRMReg, unsigned RegOpcodeFld){
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MCE.emitByte(ModRMByte(3, RegOpcodeFld, getX86RegNum(ModRMReg)));
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}
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void Emitter::emitSIBByte(unsigned SS, unsigned Index, unsigned Base) {
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// SIB byte is in the same format as the ModRMByte...
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MCE.emitByte(ModRMByte(SS, Index, Base));
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}
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void Emitter::emitConstant(unsigned Val, unsigned Size) {
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// Output the constant in little endian byte order...
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for (unsigned i = 0; i != Size; ++i) {
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MCE.emitByte(Val & 255);
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Val >>= 8;
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}
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}
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static bool isDisp8(int Value) {
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return Value == (signed char)Value;
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}
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void Emitter::emitMemModRMByte(const MachineInstr &MI,
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unsigned Op, unsigned RegOpcodeField) {
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const MachineOperand &Disp = MI.getOperand(Op+3);
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if (MI.getOperand(Op).isConstantPoolIndex()) {
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// Emit a direct address reference [disp32] where the displacement of the
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// constant pool entry is controlled by the MCE.
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MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
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unsigned Index = MI.getOperand(Op).getConstantPoolIndex();
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unsigned Address = MCE.getConstantPoolEntryAddress(Index);
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MCE.emitWord(Address+Disp.getImmedValue());
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return;
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}
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const MachineOperand &BaseReg = MI.getOperand(Op);
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const MachineOperand &Scale = MI.getOperand(Op+1);
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const MachineOperand &IndexReg = MI.getOperand(Op+2);
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// Is a SIB byte needed?
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if (IndexReg.getReg() == 0 && BaseReg.getReg() != X86::ESP) {
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if (BaseReg.getReg() == 0) { // Just a displacement?
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// Emit special case [disp32] encoding
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MCE.emitByte(ModRMByte(0, RegOpcodeField, 5));
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emitConstant(Disp.getImmedValue(), 4);
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} else {
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unsigned BaseRegNo = getX86RegNum(BaseReg.getReg());
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if (Disp.getImmedValue() == 0 && BaseRegNo != N86::EBP) {
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// Emit simple indirect register encoding... [EAX] f.e.
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MCE.emitByte(ModRMByte(0, RegOpcodeField, BaseRegNo));
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} else if (isDisp8(Disp.getImmedValue())) {
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// Emit the disp8 encoding... [REG+disp8]
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MCE.emitByte(ModRMByte(1, RegOpcodeField, BaseRegNo));
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emitConstant(Disp.getImmedValue(), 1);
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} else {
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// Emit the most general non-SIB encoding: [REG+disp32]
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MCE.emitByte(ModRMByte(2, RegOpcodeField, BaseRegNo));
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emitConstant(Disp.getImmedValue(), 4);
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}
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}
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} else { // We need a SIB byte, so start by outputting the ModR/M byte first
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assert(IndexReg.getReg() != X86::ESP && "Cannot use ESP as index reg!");
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bool ForceDisp32 = false;
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bool ForceDisp8 = false;
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if (BaseReg.getReg() == 0) {
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// If there is no base register, we emit the special case SIB byte with
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// MOD=0, BASE=5, to JUST get the index, scale, and displacement.
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MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
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ForceDisp32 = true;
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} else if (Disp.getImmedValue() == 0 && BaseReg.getReg() != X86::EBP) {
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// Emit no displacement ModR/M byte
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MCE.emitByte(ModRMByte(0, RegOpcodeField, 4));
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} else if (isDisp8(Disp.getImmedValue())) {
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// Emit the disp8 encoding...
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MCE.emitByte(ModRMByte(1, RegOpcodeField, 4));
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ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
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} else {
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// Emit the normal disp32 encoding...
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MCE.emitByte(ModRMByte(2, RegOpcodeField, 4));
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}
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// Calculate what the SS field value should be...
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static const unsigned SSTable[] = { ~0, 0, 1, ~0, 2, ~0, ~0, ~0, 3 };
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unsigned SS = SSTable[Scale.getImmedValue()];
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if (BaseReg.getReg() == 0) {
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// Handle the SIB byte for the case where there is no base. The
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// displacement has already been output.
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assert(IndexReg.getReg() && "Index register must be specified!");
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emitSIBByte(SS, getX86RegNum(IndexReg.getReg()), 5);
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} else {
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unsigned BaseRegNo = getX86RegNum(BaseReg.getReg());
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unsigned IndexRegNo;
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if (IndexReg.getReg())
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IndexRegNo = getX86RegNum(IndexReg.getReg());
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else
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IndexRegNo = 4; // For example [ESP+1*<noreg>+4]
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emitSIBByte(SS, IndexRegNo, BaseRegNo);
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}
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// Do we need to output a displacement?
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if (Disp.getImmedValue() != 0 || ForceDisp32 || ForceDisp8) {
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if (!ForceDisp32 && isDisp8(Disp.getImmedValue()))
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emitConstant(Disp.getImmedValue(), 1);
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else
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emitConstant(Disp.getImmedValue(), 4);
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}
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}
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}
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static unsigned sizeOfPtr(const TargetInstrDescriptor &Desc) {
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switch (Desc.TSFlags & X86II::ArgMask) {
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case X86II::Arg8: return 1;
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case X86II::Arg16: return 2;
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case X86II::Arg32: return 4;
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case X86II::ArgF32: return 4;
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case X86II::ArgF64: return 8;
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case X86II::ArgF80: return 10;
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default: assert(0 && "Memory size not set!");
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return 0;
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}
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}
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void Emitter::emitInstruction(MachineInstr &MI) {
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NumEmitted++; // Keep track of the # of mi's emitted
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unsigned Opcode = MI.getOpcode();
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const TargetInstrDescriptor &Desc = II->get(Opcode);
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// Emit instruction prefixes if necessary
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if (Desc.TSFlags & X86II::OpSize) MCE.emitByte(0x66);// Operand size...
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switch (Desc.TSFlags & X86II::Op0Mask) {
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case X86II::TB:
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MCE.emitByte(0x0F); // Two-byte opcode prefix
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break;
|
|
case X86II::D8: case X86II::D9: case X86II::DA: case X86II::DB:
|
|
case X86II::DC: case X86II::DD: case X86II::DE: case X86II::DF:
|
|
MCE.emitByte(0xD8+
|
|
(((Desc.TSFlags & X86II::Op0Mask)-X86II::D8)
|
|
>> X86II::Op0Shift));
|
|
break; // Two-byte opcode prefix
|
|
default: assert(0 && "Invalid prefix!");
|
|
case 0: break; // No prefix!
|
|
}
|
|
|
|
unsigned char BaseOpcode = II->getBaseOpcodeFor(Opcode);
|
|
switch (Desc.TSFlags & X86II::FormMask) {
|
|
default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
|
|
case X86II::Pseudo:
|
|
if (Opcode != X86::IMPLICIT_USE && Opcode != X86::IMPLICIT_DEF)
|
|
std::cerr << "X86 Machine Code Emitter: No 'form', not emitting: " << MI;
|
|
break;
|
|
|
|
case X86II::RawFrm:
|
|
MCE.emitByte(BaseOpcode);
|
|
if (MI.getNumOperands() == 1) {
|
|
MachineOperand &MO = MI.getOperand(0);
|
|
if (MO.isPCRelativeDisp()) {
|
|
// Conditional branch... FIXME: this should use an MBB destination!
|
|
emitPCRelativeBlockAddress(cast<BasicBlock>(MO.getVRegValue()));
|
|
} else if (MO.isGlobalAddress()) {
|
|
assert(MO.isPCRelative() && "Call target is not PC Relative?");
|
|
emitGlobalAddressForCall(MO.getGlobal());
|
|
} else if (MO.isExternalSymbol()) {
|
|
unsigned Address = MCE.getGlobalValueAddress(MO.getSymbolName());
|
|
assert(Address && "Unknown external symbol!");
|
|
emitMaybePCRelativeValue(Address, MO.isPCRelative());
|
|
} else {
|
|
assert(0 && "Unknown RawFrm operand!");
|
|
}
|
|
}
|
|
break;
|
|
|
|
case X86II::AddRegFrm:
|
|
MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
|
|
if (MI.getNumOperands() == 2) {
|
|
MachineOperand &MO1 = MI.getOperand(1);
|
|
if (MO1.isImmediate() || MO1.getVRegValueOrNull() ||
|
|
MO1.isGlobalAddress() || MO1.isExternalSymbol()) {
|
|
unsigned Size = sizeOfPtr(Desc);
|
|
if (Value *V = MO1.getVRegValueOrNull()) {
|
|
assert(Size == 4 && "Don't know how to emit non-pointer values!");
|
|
emitGlobalAddressForPtr(cast<GlobalValue>(V));
|
|
} else if (MO1.isGlobalAddress()) {
|
|
assert(Size == 4 && "Don't know how to emit non-pointer values!");
|
|
assert(!MO1.isPCRelative() && "Function pointer ref is PC relative?");
|
|
emitGlobalAddressForPtr(MO1.getGlobal());
|
|
} else if (MO1.isExternalSymbol()) {
|
|
assert(Size == 4 && "Don't know how to emit non-pointer values!");
|
|
|
|
unsigned Address = MCE.getGlobalValueAddress(MO1.getSymbolName());
|
|
assert(Address && "Unknown external symbol!");
|
|
emitMaybePCRelativeValue(Address, MO1.isPCRelative());
|
|
} else {
|
|
emitConstant(MO1.getImmedValue(), Size);
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
|
|
case X86II::MRMDestReg: {
|
|
MCE.emitByte(BaseOpcode);
|
|
MachineOperand &SrcOp = MI.getOperand(1+II->isTwoAddrInstr(Opcode));
|
|
emitRegModRMByte(MI.getOperand(0).getReg(), getX86RegNum(SrcOp.getReg()));
|
|
if (MI.getNumOperands() == 4)
|
|
emitConstant(MI.getOperand(3).getImmedValue(), sizeOfPtr(Desc));
|
|
break;
|
|
}
|
|
case X86II::MRMDestMem:
|
|
MCE.emitByte(BaseOpcode);
|
|
emitMemModRMByte(MI, 0, getX86RegNum(MI.getOperand(4).getReg()));
|
|
break;
|
|
|
|
case X86II::MRMSrcReg:
|
|
MCE.emitByte(BaseOpcode);
|
|
|
|
if (MI.getNumOperands() == 2) {
|
|
emitRegModRMByte(MI.getOperand(MI.getNumOperands()-1).getReg(),
|
|
getX86RegNum(MI.getOperand(0).getReg()));
|
|
} else if (MI.getOperand(2).isImmediate()) {
|
|
emitRegModRMByte(MI.getOperand(1).getReg(),
|
|
getX86RegNum(MI.getOperand(0).getReg()));
|
|
|
|
emitConstant(MI.getOperand(2).getImmedValue(), sizeOfPtr(Desc));
|
|
} else {
|
|
emitRegModRMByte(MI.getOperand(2).getReg(),
|
|
getX86RegNum(MI.getOperand(0).getReg()));
|
|
}
|
|
break;
|
|
|
|
case X86II::MRMSrcMem:
|
|
MCE.emitByte(BaseOpcode);
|
|
emitMemModRMByte(MI, MI.getNumOperands()-4,
|
|
getX86RegNum(MI.getOperand(0).getReg()));
|
|
break;
|
|
|
|
case X86II::MRMS0r: case X86II::MRMS1r:
|
|
case X86II::MRMS2r: case X86II::MRMS3r:
|
|
case X86II::MRMS4r: case X86II::MRMS5r:
|
|
case X86II::MRMS6r: case X86II::MRMS7r:
|
|
MCE.emitByte(BaseOpcode);
|
|
emitRegModRMByte(MI.getOperand(0).getReg(),
|
|
(Desc.TSFlags & X86II::FormMask)-X86II::MRMS0r);
|
|
|
|
if (MI.getOperand(MI.getNumOperands()-1).isImmediate()) {
|
|
unsigned Size = sizeOfPtr(Desc);
|
|
emitConstant(MI.getOperand(MI.getNumOperands()-1).getImmedValue(), Size);
|
|
}
|
|
break;
|
|
|
|
case X86II::MRMS0m: case X86II::MRMS1m:
|
|
case X86II::MRMS2m: case X86II::MRMS3m:
|
|
case X86II::MRMS4m: case X86II::MRMS5m:
|
|
case X86II::MRMS6m: case X86II::MRMS7m:
|
|
MCE.emitByte(BaseOpcode);
|
|
emitMemModRMByte(MI, 0, (Desc.TSFlags & X86II::FormMask)-X86II::MRMS0m);
|
|
|
|
if (MI.getNumOperands() == 5) {
|
|
unsigned Size = sizeOfPtr(Desc);
|
|
emitConstant(MI.getOperand(4).getImmedValue(), Size);
|
|
}
|
|
break;
|
|
}
|
|
}
|