Tim Northover 6849f102ca ARM: add constraint that RdLo != Rn != RdHi for v5 MLA insts. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199212 91177308-0d34-0410-b5e6-96231b3b80d8		2014-01-14 13:05:47 +00:00
..
Analysis	Fix broken CHECK lines.	2014-01-11 21:06:00 +00:00
Assembler	Clean up RUN command for Assembler/getInt.ll.	2014-01-13 22:37:35 +00:00
Bindings
Bitcode	Revert "Decouple dllexport/dllimport from linkage"	2014-01-14 12:38:32 +00:00
BugPoint
CodeGen	ARM: add constraint that RdLo != Rn != RdHi for v5 MLA insts.	2014-01-14 13:05:47 +00:00
DebugInfo	[SystemZ] Add "volatile" to a dead store in variable-loc.ll	2014-01-13 15:42:16 +00:00
ExecutionEngine	llvm/test/ExecutionEngine/MCJIT/load-object-a.ll: Put together rm(1) and mkdir(1) at the top.	2014-01-13 05:55:10 +00:00
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO
MC	Replace .mips_hack_stocg with ".set micromips" and ".set nomicromips".	2014-01-14 04:25:13 +00:00
Object
Other	[PM] Wire up support for writing bitcode with new PM.	2014-01-13 07:38:24 +00:00
TableGen
tools	llvm-readobj: address review comments for ARM EHABI printing	2014-01-09 04:31:18 +00:00
Transforms	Switch-to-lookup tables: Don't require a result for the default	2014-01-12 00:44:41 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh