Arnold Schwaighofer 6851623c54 ARM cost model: Add vector reverse shuffle costs ... A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad word). radar://13171406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174933 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-12 02:40:39 +00:00
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Analysis	ARM cost model: Add vector reverse shuffle costs	2013-02-12 02:40:39 +00:00
Archive
Assembler	FileCheck-ize the tests.	2013-02-11 08:34:57 +00:00
Bindings/Ocaml
Bitcode	[tsan/msan] adding thread_safety and uninitialized_checks attributes	2013-02-11 08:13:54 +00:00
BugPoint
CodeGen	ARM NEON: Handle v16i8 and v8i16 reverse shuffles	2013-02-12 01:58:32 +00:00
DebugInfo	AArch64: generate dwarfdump test rather than include .o in subversion	2013-02-11 16:28:12 +00:00
ExecutionEngine
Feature
FileCheck	Canonicalize line endings to Linux style also when the --strict-whitespace flag is in use. This flag is supposed to affect horizontal whitespaces only.	2013-02-06 20:40:38 +00:00
Instrumentation
Integer
JitListener
Linker
MC	[ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.	2013-02-12 01:00:01 +00:00
Object	[Object][ELF] Fix crash on no dynamic section.	2013-02-07 18:26:45 +00:00
Other
Scripts
TableGen
tools
Transforms	Optimization: bitcast (<1 x ...> insertelement ..., X, ...) to ... ==> bitcast X to ...	2013-02-11 21:41:44 +00:00
Unit
Verifier
YAMLParser
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh