Robert Khasanov edf556ec1f [x86] Simplify vector selection if condition value type matches vselect value type and true value is all ones or false value is all zeros. ... This transformation worked if selector is produced by SETCC, however SETCC is needed only if we consider to swap operands. So I replaced SETCC check for this case. Added tests for vselect of <X x i1> values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220777 91177308-0d34-0410-b5e6-96231b3b80d8		2014-10-28 15:59:40 +00:00
..
AArch64	AArch64: enable Cortex-A57 FP balancing on Cortex-A53.	2014-10-28 01:24:32 +00:00
ARM	[ARM] Select VMAXNM and VMINNM regardless of operand order	2014-10-27 09:23:02 +00:00
CPP
Generic	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Hexagon	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Inputs	Revert "Revert "DI: Fold constant arguments into a single MDString""	2014-10-03 20:01:09 +00:00
Mips	[mips] For N32/N64, structs must be passed in the upper bits of a register.	2014-10-24 13:09:19 +00:00
MSP430
NVPTX	[NVPTX] aligned byte-buffers for vector return types	2014-10-25 03:46:16 +00:00
PowerPC	[PATCH] Support select-cc for VSFRC when VSX is enabled	2014-10-22 16:58:20 +00:00
R600	R600/SI: Add another failing testcase for i1 copies	2014-10-22 05:30:42 +00:00
SPARC
SystemZ
Thumb	[Thumb] Fix crash in Thumb1RegisterInfo::rewriteFrameIndex	2014-10-20 11:00:18 +00:00
Thumb2	ARM: Fix a bug which was causing convergence failure in constant-island pass.	2014-10-17 01:31:47 +00:00
X86	[x86] Simplify vector selection if condition value type matches vselect value type and true value is all ones or false value is all zeros.	2014-10-28 15:59:40 +00:00
XCore	Fix a bit of confusion about .set and produce more readable assembly.	2014-10-21 01:17:30 +00:00