llvm-6502/test/CodeGen/PowerPC
Ulrich Weigand 1edaab996f [PowerPC] Constrain base register in PPCRegisterInfo::resolveFrameIndex
I've run into a bug where current LLVM at -O0 (with fast-isel)
generated invalid code like:

        ld 0, 20936(1)                  # 8-byte Folded Reload
        stw 12, 10348(0)
        stw 12, 10344(0)

The underlying vreg had been introduced as base register by the
Local Stack Slot Allocation pass.  That register was constrained
to G8RC by PPCRegisterInfo::materializeFrameBaseRegister to match
the ADDI instruction used to set it, but it was *not* constrained
to G8RC_NOX0 to fit the *use* of the register in an address.

That should have happened in PPCRegisterInfo::resolveFrameIndex.
This patch adds an appropriate constrainRegClass call.

Reviewed by Hal Finkel.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211897 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-27 13:04:12 +00:00
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fast-isel-conversion-p5.ll [PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction) 2014-06-24 20:05:18 +00:00
fast-isel-conversion.ll [PPC64] Fix PR20071 (fctiduz generated for targets lacking that instruction) 2014-06-24 20:05:18 +00:00
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Frames-alloca.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
Frames-large.ll [PowerPC] Allow stack frames without parameter save area 2014-06-23 13:47:52 +00:00
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ppc64-altivec-abi.ll [PowerPC] Fix on-stack AltiVec arguments with 64-bit SVR4 2014-06-23 12:36:34 +00:00
ppc64-calls.ll [PowerPC] Simplify and improve loading into TOC register 2014-06-18 17:52:49 +00:00
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ppc64-smallarg.ll [PowerPC] Fix small argument stack slot offset for LE 2014-06-20 16:34:05 +00:00
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vec_misaligned.ll [PPC64LE] Generate correct code for unaligned little-endian vector loads 2014-06-09 22:00:52 +00:00
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