llvm-6502/test/CodeGen
Rafael Espindola f55715c5c7 Fix PR4484.
This was caused by me confounding FP0 and ST(0).



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@74523 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-30 12:18:16 +00:00
..
Alpha Fix Alpha test and support for private linkage. 2009-01-15 21:51:46 +00:00
ARM Temporarily restore the scavenger implicit_def checking code. MachineOperand isUndef mark is not being put on implicit_def of physical registers (created for parameter passing, etc.). 2009-06-30 09:19:42 +00:00
CBackend Fix an erroneous check for isFNeg; the FNeg case is handled 2009-06-04 23:43:29 +00:00
CellSPU Add some generic expansion logic for SMULO and UMULO. Fixes UMULO 2009-06-16 06:58:29 +00:00
CPP Fix code emission for conditional branches. 2009-05-04 19:10:38 +00:00
Generic Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
IA64 Add the private linkage. 2009-01-15 20:18:42 +00:00
Mips Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
MSP430 Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
PowerPC Don't grep the -debug output. This isn't the way to test changes. 2009-06-25 21:59:32 +00:00
SPARC Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00
Thumb We should run these tests as well. 2009-06-24 21:36:26 +00:00
Thumb2 A few more load instructions. 2009-06-30 02:15:48 +00:00
X86 Fix PR4484. 2009-06-30 12:18:16 +00:00
XCore Split the Add, Sub, and Mul instruction opcodes into separate 2009-06-04 22:49:04 +00:00