llvm-6502/test/Transforms/InstCombine/pr20059.ll
Sanjay Patel 90df187c70 removed duplicate testcase
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212632 91177308-0d34-0410-b5e6-96231b3b80d8
2014-07-09 17:49:58 +00:00

17 lines
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LLVM

; RUN: opt -S -instcombine < %s | FileCheck %s
; In PR20059 ( http://llvm.org/pr20059 ), shufflevector operations are reordered/removed
; for an srem operation. This is not a valid optimization because it may cause a trap
; on div-by-zero.
; CHECK-LABEL: @do_not_reorder
; CHECK: %splat1 = shufflevector <4 x i32> %p1, <4 x i32> undef, <4 x i32> zeroinitializer
; CHECK-NEXT: %splat2 = shufflevector <4 x i32> %p2, <4 x i32> undef, <4 x i32> zeroinitializer
; CHECK-NEXT: %retval = srem <4 x i32> %splat1, %splat2
define <4 x i32> @do_not_reorder(<4 x i32> %p1, <4 x i32> %p2) {
%splat1 = shufflevector <4 x i32> %p1, <4 x i32> undef, <4 x i32> zeroinitializer
%splat2 = shufflevector <4 x i32> %p2, <4 x i32> undef, <4 x i32> zeroinitializer
%retval = srem <4 x i32> %splat1, %splat2
ret <4 x i32> %retval
}