Evan Cheng 15a16def6e Add a hybrid bottom up scheduler that reduce register usage while avoiding ... pipeline stall. It's useful for targets like ARM cortex-a8. NEON has a lot of long latency instructions so a strict register pressure reduction scheduler does not work well. Early experiments show this speeds up some NEON loops by over 30%. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104216 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-20 06:13:19 +00:00
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llvm	Add a hybrid bottom up scheduler that reduce register usage while avoiding	2010-05-20 06:13:19 +00:00
llvm-c