llvm-6502/test/CodeGen/Mips/inlineasm_constraint_R.ll
Daniel Sanders 35efeb5e16 [mips] Support 9-bit offsets for the 'R' inline assembly memory constraint.
Summary:
The 'R' constraint is actually supposed to be much more complicated than
this and is defined in terms of whether it will cause macro expansion in
the assembler. 'R' is getting less useful due to architecture changes and
ought to be replaced by other constraints. We therefore implement 9-bit
offsets which will work for all subtargets and all instructions.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8440


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233537 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-30 13:27:25 +00:00

61 lines
1.5 KiB
LLVM

; RUN: llc -march=mipsel < %s | FileCheck %s
@data = global [8193 x i32] zeroinitializer
define void @R(i32 *%p) nounwind {
entry:
; CHECK-LABEL: R:
call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 0))
; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 0($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @R_offset_4(i32 *%p) nounwind {
entry:
; CHECK-LABEL: R_offset_4:
call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 1))
; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 4($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @R_offset_254(i32 *%p) nounwind {
entry:
; CHECK-LABEL: R_offset_254:
call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 63))
; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 252($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @R_offset_256(i32 *%p) nounwind {
entry:
; CHECK-LABEL: R_offset_256:
call void asm sideeffect "lw $$1, $0", "*R,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 64))
; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: addiu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], 256
; CHECK: #APP
; CHECK: lw $1, 0($[[BASEPTR2]])
; CHECK: #NO_APP
ret void
}