Evan Cheng 9836a26da3 Fix PR5391: support early clobber physical register def tied with a use (ewwww) ... - A valno should be set HasRedefByEC if there is an early clobber def in the middle of its live ranges. It should not be set if the def of the valno is defined by an early clobber. - If a physical register def is tied to an use and it's an early clobber, it just means the HasRedefByEC is set since it's still one continuous live range. - Add a couple of missing checks for HasRedefByEC in the coalescer. In general, it should not coalesce a vr with a physical register if the physical register has a early clobber def somewhere. This is overly conservative but that's the price for using such a nasty inline asm "feature". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90269 91177308-0d34-0410-b5e6-96231b3b80d8		2009-12-01 22:25:00 +00:00
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Alpha
ARM	Fix PR5614: parts of a physical register def may be killed the rest.	2009-12-01 00:44:45 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic	While this test is testing a problem in the generic part of codegen,	2009-11-27 16:04:14 +00:00
Mips	Support PIC loading of constant pool entries	2009-11-25 12:17:58 +00:00
MSP430	While this test is testing a problem in the generic part of codegen,	2009-11-27 16:04:14 +00:00
PIC16	While this test is testing a problem in the generic part of codegen,	2009-11-27 16:04:14 +00:00
PowerPC	ProcessImplicitDefs should watch out for invalidated iterator and extra implicit operands on copies.	2009-11-25 21:13:39 +00:00
SPARC
SystemZ
Thumb	More consistent thumb1 asm printing.	2009-11-19 06:57:41 +00:00
Thumb2	test case for IV-Users simplification loop improvement	2009-12-01 21:53:51 +00:00
X86	Fix PR5391: support early clobber physical register def tied with a use (ewwww)	2009-12-01 22:25:00 +00:00
XCore	Add XCore support for indirectbr / blockaddress.	2009-11-18 23:20:42 +00:00