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LLVM backend for 6502
6a45d681e5
A Register with subregisters must also provide SubRegIndices for adressing the subregisters. TableGen automatically inherits indices for sub-subregisters to minimize typing. CompositeIndices may be specified for the weirder cases such as the XMM sub_sd index that returns the same register, and ARM NEON Q registers where both D subregs have ssub_0 and ssub_1 sub-subregs. It is now required that all subregisters are named by an index, and a future patch will also require inherited subregisters to be named. This is necessary to allow composite subregister indices to be reduced to a single index. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104654 91177308-0d34-0410-b5e6-96231b3b80d8 |
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| tools | ||
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| build-for-llvm-top.sh | ||
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| CREDITS.TXT | ||
| LICENSE.TXT | ||
| llvm.spec.in | ||
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| Makefile.common | ||
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| Makefile.rules | ||
| ModuleInfo.txt | ||
| README.txt | ||
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