mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b2b5dc642c
This reverts commit 98a9b72e8c.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184823 91177308-0d34-0410-b5e6-96231b3b80d8
170 lines
7.2 KiB
LLVM
170 lines
7.2 KiB
LLVM
; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=X32 %s
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; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=WIN64 %s
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck -check-prefix=X64 %s
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declare <16 x float> @func_float16_ptr(<16 x float>, <16 x float> *)
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declare <16 x float> @func_float16(<16 x float>, <16 x float>)
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declare i32 @func_int(i32, i32)
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; WIN64: testf16_inp
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; WIN64: vaddps {{.*}}, {{%ymm[0-1]}}
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; WIN64: vaddps {{.*}}, {{%ymm[0-1]}}
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; WIN64: leaq {{.*}}(%rsp), %rcx
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; WIN64: call
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; WIN64: ret
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; X32: testf16_inp
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; X32: movl %eax, (%esp)
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; X32: vaddps {{.*}}, {{%ymm[0-1]}}
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; X32: vaddps {{.*}}, {{%ymm[0-1]}}
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; X32: call
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; X32: ret
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; X64: testf16_inp
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; X64: vaddps {{.*}}, {{%ymm[0-1]}}
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; X64: vaddps {{.*}}, {{%ymm[0-1]}}
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; X64: leaq {{.*}}(%rsp), %rdi
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; X64: call
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; X64: ret
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;test calling conventions - input parameters
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define <16 x float> @testf16_inp(<16 x float> %a, <16 x float> %b) nounwind {
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%y = alloca <16 x float>, align 16
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%x = fadd <16 x float> %a, %b
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%1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, <16 x float>* %y)
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%2 = load <16 x float>* %y, align 16
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%3 = fadd <16 x float> %2, %1
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ret <16 x float> %3
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}
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;test calling conventions - preserved registers
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; preserved ymm6-ymm15
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; WIN64: testf16_regs
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; WIN64: call
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; WIN64: vaddps {{%ymm[6-7]}}, %ymm0, %ymm0
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; WIN64: vaddps {{%ymm[6-7]}}, %ymm1, %ymm1
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; WIN64: ret
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; preserved ymm8-ymm15
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; X64: testf16_regs
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; X64: call
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; X64: vaddps {{%ymm[8-9]}}, %ymm0, %ymm0
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; X64: vaddps {{%ymm[8-9]}}, %ymm1, %ymm1
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; X64: ret
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define <16 x float> @testf16_regs(<16 x float> %a, <16 x float> %b) nounwind {
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%y = alloca <16 x float>, align 16
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%x = fadd <16 x float> %a, %b
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%1 = call intel_ocl_bicc <16 x float> @func_float16_ptr(<16 x float> %x, <16 x float>* %y)
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%2 = load <16 x float>* %y, align 16
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%3 = fadd <16 x float> %1, %b
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%4 = fadd <16 x float> %2, %3
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ret <16 x float> %4
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}
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; test calling conventions - prolog and epilog
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: vmovaps {{%ymm([6-9]|1[0-5])}}, {{.*(%rsp).*}} # 32-byte Spill
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; WIN64: call
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; WIN64: vmovaps {{.*(%rsp).*}}, {{%ymm([6-9]|1[0-5])}} # 32-byte Reload
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; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Folded Spill
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; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Folded Spill
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; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Folded Spill
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; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Folded Spill
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; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Folded Spill
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; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Folded Spill
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; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Folded Spill
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; X64: vmovups {{%ymm([8-9]|1[0-5])}}, {{.*}}(%rsp) ## 32-byte Folded Spill
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; X64: call
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; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Folded Reload
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; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Folded Reload
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; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Folded Reload
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; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Folded Reload
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; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Folded Reload
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; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Folded Reload
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; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Folded Reload
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; X64: vmovups {{.*}}(%rsp), {{%ymm([8-9]|1[0-5])}} ## 32-byte Folded Reload
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define intel_ocl_bicc <16 x float> @test_prolog_epilog(<16 x float> %a, <16 x float> %b) nounwind {
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%c = call <16 x float> @func_float16(<16 x float> %a, <16 x float> %b)
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ret <16 x float> %c
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}
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; test functions with integer parameters
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; pass parameters on stack for 32-bit platform
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; X32: movl {{.*}}, 4(%esp)
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; X32: movl {{.*}}, (%esp)
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; X32: call
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; X32: addl {{.*}}, %eax
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; pass parameters in registers for 64-bit platform
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; X64: leal {{.*}}, %edi
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; X64: movl {{.*}}, %esi
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; X64: call
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; X64: addl {{.*}}, %eax
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define i32 @test_int(i32 %a, i32 %b) nounwind {
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%c1 = add i32 %a, %b
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%c2 = call intel_ocl_bicc i32 @func_int(i32 %c1, i32 %a)
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%c = add i32 %c2, %b
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ret i32 %c
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}
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; WIN64: test_float4
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; WIN64-NOT: vzeroupper
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; WIN64: call
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; WIN64-NOT: vzeroupper
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; WIN64: call
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; WIN64: ret
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; X64: test_float4
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; X64-NOT: vzeroupper
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; X64: call
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; X64-NOT: vzeroupper
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; X64: call
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; X64: ret
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; X32: test_float4
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; X32: vzeroupper
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; X32: call
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; X32: vzeroupper
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; X32: call
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; X32: ret
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declare <4 x float> @func_float4(<4 x float>, <4 x float>, <4 x float>)
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define <8 x float> @test_float4(<8 x float> %a, <8 x float> %b, <8 x float> %c) nounwind readnone {
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entry:
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%0 = shufflevector <8 x float> %a, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%1 = shufflevector <8 x float> %b, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%2 = shufflevector <8 x float> %c, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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%call.i = tail call intel_ocl_bicc <4 x float> @func_float4(<4 x float> %0, <4 x float> %1, <4 x float> %2) nounwind
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%3 = shufflevector <4 x float> %call.i, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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%4 = shufflevector <8 x float> %a, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%5 = shufflevector <8 x float> %b, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%6 = shufflevector <8 x float> %c, <8 x float> undef, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
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%call.i2 = tail call intel_ocl_bicc <4 x float> @func_float4(<4 x float> %4, <4 x float> %5, <4 x float> %6) nounwind
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%7 = shufflevector <4 x float> %call.i2, <4 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>
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%8 = shufflevector <8 x float> %3, <8 x float> %7, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
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ret <8 x float> %8
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}
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