mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-02 07:11:49 +00:00
8b2b8a1835
This update was done with the following bash script:
find test/CodeGen -name "*.ll" | \
while read NAME; do
echo "$NAME"
if ! grep -q "^; *RUN: *llc.*debug" $NAME; then
TEMP=`mktemp -t temp`
cp $NAME $TEMP
sed -n "s/^define [^@]*@\([A-Za-z0-9_]*\)(.*$/\1/p" < $NAME | \
while read FUNC; do
sed -i '' "s/;\(.*\)\([A-Za-z0-9_-]*\):\( *\)$FUNC: *\$/;\1\2-LABEL:\3$FUNC:/g" $TEMP
done
sed -i '' "s/;\(.*\)-LABEL-LABEL:/;\1-LABEL:/" $TEMP
sed -i '' "s/;\(.*\)-NEXT-LABEL:/;\1-NEXT:/" $TEMP
sed -i '' "s/;\(.*\)-NOT-LABEL:/;\1-NOT:/" $TEMP
sed -i '' "s/;\(.*\)-DAG-LABEL:/;\1-DAG:/" $TEMP
mv $TEMP $NAME
fi
done
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186280 91177308-0d34-0410-b5e6-96231b3b80d8
87 lines
2.8 KiB
LLVM
87 lines
2.8 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s
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; rdar://10050222, rdar://10134392
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define <4 x float> @t1(<4 x float> %a, <1 x i64>* nocapture %p) nounwind {
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entry:
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; CHECK-LABEL: t1:
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; CHECK: movlps (%rdi), %xmm0
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; CHECK: ret
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%p.val = load <1 x i64>* %p, align 1
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%0 = bitcast <1 x i64> %p.val to <2 x float>
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%shuffle.i = shufflevector <2 x float> %0, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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%shuffle1.i = shufflevector <4 x float> %a, <4 x float> %shuffle.i, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
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ret <4 x float> %shuffle1.i
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}
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define <4 x float> @t1a(<4 x float> %a, <1 x i64>* nocapture %p) nounwind {
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entry:
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; CHECK-LABEL: t1a:
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; CHECK: movlps (%rdi), %xmm0
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; CHECK: ret
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%0 = bitcast <1 x i64>* %p to double*
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%1 = load double* %0
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%2 = insertelement <2 x double> undef, double %1, i32 0
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%3 = bitcast <2 x double> %2 to <4 x float>
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%4 = shufflevector <4 x float> %a, <4 x float> %3, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
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ret <4 x float> %4
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}
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define void @t2(<1 x i64>* nocapture %p, <4 x float> %a) nounwind {
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entry:
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; CHECK-LABEL: t2:
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; CHECK: movlps %xmm0, (%rdi)
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; CHECK: ret
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%cast.i = bitcast <4 x float> %a to <2 x i64>
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%extract.i = extractelement <2 x i64> %cast.i, i32 0
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%0 = getelementptr inbounds <1 x i64>* %p, i64 0, i64 0
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store i64 %extract.i, i64* %0, align 8
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ret void
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}
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define void @t2a(<1 x i64>* nocapture %p, <4 x float> %a) nounwind {
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entry:
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; CHECK-LABEL: t2a:
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; CHECK: movlps %xmm0, (%rdi)
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; CHECK: ret
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%0 = bitcast <1 x i64>* %p to double*
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%1 = bitcast <4 x float> %a to <2 x double>
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%2 = extractelement <2 x double> %1, i32 0
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store double %2, double* %0
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ret void
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}
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; rdar://10436044
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define <2 x double> @t3() nounwind readonly {
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bb:
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; CHECK-LABEL: t3:
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; CHECK: punpcklqdq %xmm1, %xmm0
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; CHECK: movq (%rax), %xmm1
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; CHECK: movsd %xmm1, %xmm0
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%tmp0 = load i128* null, align 1
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%tmp1 = load <2 x i32>* undef, align 8
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%tmp2 = bitcast i128 %tmp0 to <16 x i8>
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%tmp3 = bitcast <2 x i32> %tmp1 to i64
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%tmp4 = insertelement <2 x i64> undef, i64 %tmp3, i32 0
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%tmp5 = bitcast <16 x i8> %tmp2 to <2 x double>
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%tmp6 = bitcast <2 x i64> %tmp4 to <2 x double>
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%tmp7 = shufflevector <2 x double> %tmp5, <2 x double> %tmp6, <2 x i32> <i32 2, i32 1>
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ret <2 x double> %tmp7
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}
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; rdar://10450317
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define <2 x i64> @t4() nounwind readonly {
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bb:
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; CHECK-LABEL: t4:
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; CHECK: punpcklqdq %xmm0, %xmm1
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; CHECK: movq (%rax), %xmm0
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; CHECK: movsd %xmm1, %xmm0
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%tmp0 = load i128* null, align 1
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%tmp1 = load <2 x i32>* undef, align 8
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%tmp2 = bitcast i128 %tmp0 to <16 x i8>
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%tmp3 = bitcast <2 x i32> %tmp1 to i64
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%tmp4 = insertelement <2 x i64> undef, i64 %tmp3, i32 0
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%tmp5 = bitcast <16 x i8> %tmp2 to <2 x i64>
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%tmp6 = shufflevector <2 x i64> %tmp4, <2 x i64> %tmp5, <2 x i32> <i32 2, i32 1>
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ret <2 x i64> %tmp6
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}
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