llvm-6502/test/CodeGen
Manman Ren f40d578d7e Debug Info Finder|Verifier: handle DbgLoc attached to instructions.
Also remove checking of llvm.dbg.sp since it is not used in generating dwarf.

Current state of Finder:
DebugInfoFinder tries to list all debug info MDNodes used in a module. To
list debug info MDNodes used by an instruction, DebugInfoFinder provides
processDeclare, processValue and processLocation to handle DbgDeclareInst,
DbgValueInst and DbgLoc attached to instructions. processModule will go
through all DICompileUnits in llvm.dbg.cu and list debug info MDNodes
used by the CUs.

TODO:
1> Finder has a list of CUs, SPs, Types, Scopes and global variables. We
need to add a list of variables that are used by DbgDeclareInst and
DbgValueInst.
2> MDString fields should be null or isa<MDString> and MDNode fields should be
null or isa<MDNode>. We currently use empty string or int 0 to represent null.
3> Go though Verify functions and make sure that they check field types.
4> Clean up existing testing cases to remove llvm.dbg.sp and make sure each
testing case has a llvm.dbg.cu.

Re-apply r187609 with fix to pass ocaml binding. vmcore.ml generates a debug
location with scope being metadata !{}, in verifier we treat this as a null
scope.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187812 91177308-0d34-0410-b5e6-96231b3b80d8
2013-08-06 19:38:43 +00:00
..
AArch64 AArch64: add initial NEON support 2013-08-01 09:20:35 +00:00
ARM Debug Info Finder|Verifier: handle DbgLoc attached to instructions. 2013-08-06 19:38:43 +00:00
CPP
Generic Debug Info: clean up usage of Verify. 2013-06-28 05:43:10 +00:00
Hexagon Refactor isInTailCallPosition handling 2013-08-06 09:12:35 +00:00
Inputs Debug Info Verifier: verify SPs in llvm.dbg.sp. 2013-07-27 01:26:08 +00:00
Mips Add the saving of S2. This is needed for some of the floating point 2013-08-04 23:56:53 +00:00
MSP430 Use conventional syntax for branches. 2013-07-14 18:19:44 +00:00
NVPTX [NVPTX] Add missing patterns for i1 [s,u]int_to_fp 2013-08-06 14:13:34 +00:00
PowerPC Add PPC64 mulli pattern 2013-08-06 17:03:03 +00:00
R600 Factor FlattenCFG out from SimplifyCFG 2013-08-06 02:43:45 +00:00
SI
SPARC Allocate local registers in order for optimal coloring. 2013-07-25 18:35:14 +00:00
SystemZ [SystemZ] Use BRCT and BRCTG to eliminate add-&-compare sequences 2013-08-05 11:23:46 +00:00
Thumb Debug Info: update testing cases to pass verifier. 2013-07-29 18:12:58 +00:00
Thumb2 Refactor AnalyzeBranch on ARM. The previous version did not always analyze 2013-07-19 23:52:47 +00:00
X86 Debug Info Finder|Verifier: handle DbgLoc attached to instructions. 2013-08-06 19:38:43 +00:00
XCore XCore target: Fix Vararg handling 2013-08-01 08:29:44 +00:00