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llvm-6502/lib/Target
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Evan Cheng 0114e94903 ISEL code for MULHU, MULHS, and UNDEF. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25132 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-06 20:36:21 +00:00
..
Alpha
make 0 codegen much better
2006-01-06 19:41:51 +00:00
CBackend
yet more C++ standards-compliance stuff.
2005-12-27 10:40:34 +00:00
IA64
silence a bogus gcc warning
2006-01-06 17:56:38 +00:00
PowerPC
linkonce symbols have an extra indirection, just like weak ones do. This fixes
2006-01-06 01:04:03 +00:00
Skeleton
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
2005-12-01 04:51:06 +00:00
Sparc
silence a bogus gcc warning
2006-01-06 17:56:38 +00:00
SparcV8
silence a bogus gcc warning
2006-01-06 17:56:38 +00:00
SparcV9
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
2005-12-01 04:51:06 +00:00
X86
ISEL code for MULHU, MULHS, and UNDEF.
2006-01-06 20:36:21 +00:00
Makefile
DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now
2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp
Rename MRegisterDesc -> TargetRegisterDesc for consistency
2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp
Preparation of supporting scheduling info. Need to find info based on selected
2005-10-25 15:15:28 +00:00
Target.td
Added field noResults to Instruction.
2005-12-26 09:11:45 +00:00
TargetData.cpp
…
TargetFrameInfo.cpp
…
TargetInstrInfo.cpp
…
TargetMachine.cpp
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TargetMachineRegistry.cpp
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TargetSchedInfo.cpp
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TargetSchedule.td
add a marker
2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td
Added fpimm node for ConstantFP.
2006-01-05 02:07:49 +00:00
TargetSubtarget.cpp
…