Jack Carter 490c7d9773 Akira, ... Hope you are feeling better. The Mips RDHWR (Read Hardware Register) instruction was not tested for assembler or dissassembler consumption. This patch adds that functionality. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172579 91177308-0d34-0410-b5e6-96231b3b80d8		2013-01-16 00:07:45 +00:00
..
Analysis
Archive
Assembler
Bindings/Ocaml
Bitcode
BugPoint
CodeGen	This patch addresses an incorrect transformation in the DAG combiner.	2013-01-14 22:04:38 +00:00
DebugInfo	Split address information for DWARF5 split dwarf proposal. This involves	2013-01-15 23:56:56 +00:00
ExecutionEngine
Feature	There was a switch fall-through in the parser for textual LLVM that caused	2013-01-07 13:32:38 +00:00
FileCheck
Instrumentation	[msan] Temporarily remove ICmpEQ tests.	2013-01-15 17:12:04 +00:00
Integer
JitListener
Linker	Fix a copy/paste error in the IR Linker, casting an ArrayType instead of a VectorType.	2013-01-10 10:49:36 +00:00
MC	Akira,	2013-01-16 00:07:45 +00:00
Object	[llvm-objdump] Emit addresses with the correct number of leading 0's.	2013-01-10 22:40:50 +00:00
Other
Scripts
TableGen
tools
Transforms	Teach InstCombine to optimize extract of a value from a vector add operation with a constant zero.	2013-01-15 23:43:14 +00:00
Unit
Verifier	[IR] Add verification for module flags with the "require" behavior.	2013-01-15 20:52:06 +00:00
YAMLParser
CMakeLists.txt
lit.cfg
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh