Tilmann Scheller 6b968eccd7 ARM: Teach assembler to enforce constraint for Thumb2 LDRD (literal/immediate) destination register operands. ... LDRD<c> <Rt>, <Rt2>, <label> LDRD<c> <Rt>, <Rt2>, [<Rn>{, #+/-<imm>}] LDRD<c> <Rt>, <Rt2>, [<Rn>], #+/-<imm> LDRD<c> <Rt>, <Rt2>, [<Rn>, #+/-<imm>]! As specified in A8.8.72/A8.8.73 in the ARM ARM, the T1 encoding has a constraint which enforces that Rt != Rt2. If this constraint is not met the result of executing the instruction will be unpredictable. Fixes rdar://14479780. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@191504 91177308-0d34-0410-b5e6-96231b3b80d8		2013-09-27 10:30:18 +00:00
..
ARMAsmParser.cpp	ARM: Teach assembler to enforce constraint for Thumb2 LDRD (literal/immediate) destination register operands.	2013-09-27 10:30:18 +00:00
CMakeLists.txt	Remove MCTargetAsmLexer and its derived classes now that edis,	2012-12-20 14:43:30 +00:00
LLVMBuild.txt	LLVMBuild: Remove trailing newline, which irked me.	2011-12-12 19:48:00 +00:00
Makefile