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llvm-6502/lib/Target/Hexagon
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Pranav Bhandarkar 4c3d3ecdf8 LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the 
subreg_hireg of register pair Rp.

	* lib/Target/Hexagon/HexagonPeephole.cpp(PeepholeDoubleRegsMap): New
	 DenseMap similar to PeepholeMap that additionally records subreg info
	 too.
        (runOnMachineFunction): Record information in PeepholeDoubleRegsMap
        and copy propagate the high sub-reg of Rp0 in Rp1 = lsr(Rp0, #32) to
	the instruction Rx = COPY Rp1:logreg_subreg.
	* test/CodeGen/Hexagon/remove_lsr.ll: New test.
	



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163214 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-05 16:01:40 +00:00
..
InstPrinter Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
MCTargetDesc Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
TargetInfo
CMakeLists.txt Porting Hexagon MI Scheduler to the new API. 2012-09-04 14:49:56 +00:00
Hexagon.h Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
Hexagon.td I'm introducing a new machine model to simultaneously allow simple 2012-07-07 04:00:00 +00:00
HexagonAsmPrinter.cpp There are a number of generic inline asm operand modifiers that 2012-06-26 13:49:27 +00:00
HexagonAsmPrinter.h Hexagon: enable assembler output through the MC layer. 2012-04-12 17:55:53 +00:00
HexagonCallingConv.td Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonCallingConvLower.cpp Switch some getAliasSet clients to MCRegAliasIterator. 2012-06-01 20:36:54 +00:00
HexagonCallingConvLower.h
HexagonCFGOptimizer.cpp Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonExpandPredSpillCode.cpp Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
HexagonFrameLowering.cpp Extract some pointer hacking to a function. 2012-05-30 22:40:03 +00:00
HexagonFrameLowering.h
HexagonHardwareLoops.cpp Don't use getNextOperandForReg(). 2012-08-08 23:44:04 +00:00
HexagonImmediates.td Fix typos found by http://github.com/lyda/misspell-check 2012-06-02 10:20:22 +00:00
HexagonInstrFormats.td Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonInstrFormatsV4.td Extensions of Hexagon V4 instructions. 2012-05-03 16:18:50 +00:00
HexagonInstrInfo.cpp *typo: Cyles changed to Cycles 2012-06-13 15:53:04 +00:00
HexagonInstrInfo.h *typo: Cyles changed to Cycles 2012-06-13 15:53:04 +00:00
HexagonInstrInfo.td [Hexagon] Don't mark callee saved registers as clobbered by a tail call 2012-08-13 19:54:01 +00:00
HexagonInstrInfoV3.td Remove variable_ops from call instructions in most targets. 2012-07-13 20:44:29 +00:00
HexagonInstrInfoV4.td Remove variable_ops from call instructions in most targets. 2012-07-13 20:44:29 +00:00
HexagonInstrInfoV5.td Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
HexagonIntrinsics.td Hexagon V5 intrinsics support. 2012-05-11 19:39:13 +00:00
HexagonIntrinsicsDerived.td Hexagon V5 intrinsics support. 2012-05-11 19:39:13 +00:00
HexagonIntrinsicsV3.td
HexagonIntrinsicsV4.td
HexagonIntrinsicsV5.td Remove tabs. 2012-07-19 00:25:04 +00:00
HexagonISelDAGToDAG.cpp Revert 156634 upon request until code improvement changes are made. 2012-05-14 19:35:42 +00:00
HexagonISelLowering.cpp Remove tabs. 2012-07-19 00:11:40 +00:00
HexagonISelLowering.h Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall 2012-05-25 16:35:28 +00:00
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp Porting Hexagon MI Scheduler to the new API. 2012-09-04 14:49:56 +00:00
HexagonMachineScheduler.h Remove redundant semicolons to fix -pedantic-errors build. 2012-09-05 01:41:37 +00:00
HexagonMCInst.h Remove excess semi-colons to quiet warnings. 2012-05-08 20:45:04 +00:00
HexagonMCInstLower.cpp Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
HexagonNewValueJump.cpp Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed. 2012-08-22 06:07:19 +00:00
HexagonPeephole.cpp LLVM Bug Fix 13709: Remove needless lsr(Rp, #32) instruction access the 2012-09-05 16:01:40 +00:00
HexagonRegisterInfo.cpp Porting Hexagon MI Scheduler to the new API. 2012-09-04 14:49:56 +00:00
HexagonRegisterInfo.h Porting Hexagon MI Scheduler to the new API. 2012-09-04 14:49:56 +00:00
HexagonRegisterInfo.td Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonRemoveSZExtArgs.cpp Fix typos found by http://github.com/lyda/misspell-check 2012-06-02 10:20:22 +00:00
HexagonSchedule.td Porting Hexagon MI Scheduler to the new API. 2012-09-04 14:49:56 +00:00
HexagonScheduleV4.td Porting Hexagon MI Scheduler to the new API. 2012-09-04 14:49:56 +00:00
HexagonSelectCCInfo.td Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonSplitTFRCondSets.cpp Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonSubtarget.cpp fix HexagonSubtarget parsing of -mv flag 2012-08-20 19:56:47 +00:00
HexagonSubtarget.h Hexagon V5 FP Support. 2012-05-10 20:20:25 +00:00
HexagonTargetMachine.cpp Porting Hexagon MI Scheduler to the new API. 2012-09-04 14:49:56 +00:00
HexagonTargetMachine.h Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
HexagonTargetObjectFile.cpp Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 2012-03-17 18:46:09 +00:00
HexagonTargetObjectFile.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonVarargsCallingConvention.h Emacs-tag and some comment fix for all ARM, CellSPU, Hexagon, MBlaze, MSP430, PPC, PTX, Sparc, X86, XCore. 2012-02-18 12:03:15 +00:00
HexagonVLIWPacketizer.cpp Rename hasVolatileMemoryRef() to hasOrderedMemoryRef(). 2012-08-29 21:19:21 +00:00
LLVMBuild.txt Hexagon: enable assembler output through the MC layer. 2012-04-12 17:55:53 +00:00
Makefile Hexagon: enable assembler output through the MC layer. 2012-04-12 17:55:53 +00:00