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llvm-6502/lib/Target/R600
History
Tom Stellard 5e48a0e9ae R600: Use new getNamedOperandIdx function generated by TableGen 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184880 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-25 21:22:18 +00:00
..
InstPrinter
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MCTargetDesc
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TargetInfo
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AMDGPU.h
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AMDGPU.td
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AMDGPUAsmPrinter.cpp
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AMDGPUAsmPrinter.h
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AMDGPUCallingConv.td
R600/SI: Add support for v4i32 and v4f32 kernel args
2013-06-25 02:39:25 +00:00
AMDGPUConvertToISA.cpp
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AMDGPUFrameLowering.cpp
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AMDGPUFrameLowering.h
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AMDGPUIndirectAddressing.cpp
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AMDGPUInstrInfo.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
AMDGPUInstrInfo.h
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
AMDGPUInstrInfo.td
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AMDGPUInstructions.td
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AMDGPUIntrinsics.td
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AMDGPUISelLowering.cpp
R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
2013-06-25 13:55:57 +00:00
AMDGPUISelLowering.h
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AMDGPUMachineFunction.cpp
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AMDGPUMachineFunction.h
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AMDGPUMCInstLower.cpp
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AMDGPUMCInstLower.h
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AMDGPURegisterInfo.cpp
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AMDGPURegisterInfo.h
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AMDGPURegisterInfo.td
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AMDGPUSubtarget.cpp
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AMDGPUSubtarget.h
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AMDGPUTargetMachine.cpp
Move StructurizeCFG out of R600 to generic Transforms.
2013-06-19 20:18:24 +00:00
AMDGPUTargetMachine.h
Remove dead prototype.
2013-06-18 06:24:14 +00:00
AMDILBase.td
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AMDILCFGStructurizer.cpp
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AMDILInstrInfo.td
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AMDILIntrinsicInfo.cpp
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AMDILIntrinsicInfo.h
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AMDILIntrinsics.td
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AMDILISelDAGToDAG.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
AMDILISelLowering.cpp
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AMDILRegisterInfo.td
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CMakeLists.txt
Move StructurizeCFG out of R600 to generic Transforms.
2013-06-19 20:18:24 +00:00
LLVMBuild.txt
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Makefile
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Processors.td
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R600ControlFlowFinalizer.cpp
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R600Defines.h
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
R600EmitClauseMarkers.cpp
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R600ExpandSpecialInstrs.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
R600InstrFormats.td
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R600InstrInfo.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
R600InstrInfo.h
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
R600Instructions.td
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
R600Intrinsics.td
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R600ISelLowering.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
R600ISelLowering.h
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R600MachineFunctionInfo.cpp
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R600MachineFunctionInfo.h
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R600MachineScheduler.cpp
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R600MachineScheduler.h
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R600OptimizeVectorRegisters.cpp
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R600Packetizer.cpp
R600: Use new getNamedOperandIdx function generated by TableGen
2013-06-25 21:22:18 +00:00
R600RegisterInfo.cpp
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R600RegisterInfo.h
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R600RegisterInfo.td
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R600Schedule.td
R600: Fix typo in R600Schedule.td
2013-06-25 02:39:20 +00:00
R600TextureIntrinsicsReplacer.cpp
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SIAnnotateControlFlow.cpp
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SIDefines.h
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SIInsertWaits.cpp
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SIInstrFormats.td
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SIInstrInfo.cpp
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SIInstrInfo.h
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SIInstrInfo.td
Access the TargetLoweringInfo from the TargetMachine object instead of caching it. The TLI may change between functions. No functionality change.
2013-06-19 21:36:55 +00:00
SIInstructions.td
R600: Add SI load support for v[24]i32 and store for v2i32
2013-06-15 00:09:31 +00:00
SIIntrinsics.td
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SIISelLowering.cpp
R600: Consolidate expansion of v2i32/v4i32 ops for EG/SI
2013-06-25 13:55:57 +00:00
SIISelLowering.h
R600/SI: Report unaligned memory accesses as legal for > 32-bit types
2013-06-25 02:39:35 +00:00
SILowerControlFlow.cpp
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SIMachineFunctionInfo.cpp
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SIMachineFunctionInfo.h
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SIRegisterInfo.cpp
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SIRegisterInfo.h
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SIRegisterInfo.td
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SISchedule.td
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