Akira Hatanaka 9a308df027 [mips] Improve code generation for constant multiplication using shifts, adds and ... subs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185011 91177308-0d34-0410-b5e6-96231b3b80d8		2013-06-26 18:48:17 +00:00
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AArch64
ARM	Add a subtarget feature 'v8' to the ARM backend.	2013-06-26 16:58:26 +00:00
CPP
Generic
Hexagon
Inputs
MBlaze
Mips	[mips] Improve code generation for constant multiplication using shifts, adds and	2013-06-26 18:48:17 +00:00
MSP430
NVPTX	[NVPTX] Add support for selecting CUDA vs OCL mode based on triple	2013-06-21 18:51:49 +00:00
PowerPC
R600	R600: Use new getNamedOperandIdx function generated by TableGen	2013-06-25 21:22:18 +00:00
SI
SPARC
SystemZ
Thumb
Thumb2	ARM: allow predicated barriers in Thumb mode	2013-06-26 16:52:32 +00:00
X86	Optimized integer vector multiplication operation by replacing it with shift/xor/sub when it is possible. Fixed a bug in SDIV, where the const operand is not a splat constant vector.	2013-06-26 10:55:03 +00:00
XCore