mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-25 14:30:32 +00:00
71490fa946
- variety of compare instructions, - loops with no preheader, - arbitrary lower and upper bounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174904 91177308-0d34-0410-b5e6-96231b3b80d8
43 lines
1.2 KiB
CMake
43 lines
1.2 KiB
CMake
set(LLVM_TARGET_DEFINITIONS Hexagon.td)
|
|
|
|
tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
|
|
tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info)
|
|
tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer)
|
|
tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel)
|
|
tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv)
|
|
tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget)
|
|
tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer)
|
|
add_public_tablegen_target(HexagonCommonTableGen)
|
|
|
|
set(LLVM_COMMON_DEPENDS intrinsics_gen)
|
|
|
|
add_llvm_target(HexagonCodeGen
|
|
HexagonAsmPrinter.cpp
|
|
HexagonCallingConvLower.cpp
|
|
HexagonCFGOptimizer.cpp
|
|
HexagonExpandPredSpillCode.cpp
|
|
HexagonFrameLowering.cpp
|
|
HexagonHardwareLoops.cpp
|
|
HexagonFixupHwLoops.cpp
|
|
HexagonMachineScheduler.cpp
|
|
HexagonMCInstLower.cpp
|
|
HexagonInstrInfo.cpp
|
|
HexagonISelDAGToDAG.cpp
|
|
HexagonISelLowering.cpp
|
|
HexagonPeephole.cpp
|
|
HexagonRegisterInfo.cpp
|
|
HexagonRemoveSZExtArgs.cpp
|
|
HexagonSelectionDAGInfo.cpp
|
|
HexagonSplitTFRCondSets.cpp
|
|
HexagonSubtarget.cpp
|
|
HexagonTargetMachine.cpp
|
|
HexagonTargetObjectFile.cpp
|
|
HexagonVLIWPacketizer.cpp
|
|
HexagonNewValueJump.cpp
|
|
)
|
|
|
|
add_subdirectory(TargetInfo)
|
|
add_subdirectory(InstPrinter)
|
|
add_subdirectory(MCTargetDesc)
|
|
|