mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-09-09 15:57:28 +00:00
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173568 91177308-0d34-0410-b5e6-96231b3b80d8
241 lines
9.0 KiB
LLVM
241 lines
9.0 KiB
LLVM
; RUN: llc <%s -march=x86 -mcpu=penryn -mattr=sse41 | FileCheck %s
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; Splat test for v8i16
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; Should generate with pshufd with masks $0, $85, $170, $255 (each mask is used twice)
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define <8 x i16> @shuf_8i16_0(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <8 x i16> %tmp6
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; CHECK: shuf_8i16_0:
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; CHECK: punpcklwd
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; CHECK-NEXT: pshufd $0
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}
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define <8 x i16> @shuf_8i16_1(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <8 x i16> %tmp6
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; CHECK: shuf_8i16_1:
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; CHECK: punpcklwd
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; CHECK-NEXT: pshufd $85
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}
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define <8 x i16> @shuf_8i16_2(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 undef, i32 undef>
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ret <8 x i16> %tmp6
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; CHECK: shuf_8i16_2:
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; CHECK: punpcklwd
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; CHECK-NEXT: pshufd $-86
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}
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define <8 x i16> @shuf_8i16_3(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 3, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <8 x i16> %tmp6
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; CHECK: shuf_8i16_3:
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; CHECK: punpcklwd
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; CHECK-NEXT: pshufd $-1
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}
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define <8 x i16> @shuf_8i16_4(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 4, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 undef, i32 undef>
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ret <8 x i16> %tmp6
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; CHECK: shuf_8i16_4:
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; CHECK: punpckhwd
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; CHECK-NEXT: pshufd $0
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}
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define <8 x i16> @shuf_8i16_5(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 5, i32 undef, i32 undef, i32 5, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <8 x i16> %tmp6
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; CHECK: shuf_8i16_5:
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; CHECK: punpckhwd
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; CHECK-NEXT: pshufd $85
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}
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define <8 x i16> @shuf_8i16_6(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 6, i32 6, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <8 x i16> %tmp6
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; CHECK: shuf_8i16_6:
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; CHECK: punpckhwd
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; CHECK-NEXT: pshufd $-86
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}
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define <8 x i16> @shuf_8i16_7(<8 x i16> %T0, <8 x i16> %T1) nounwind readnone {
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%tmp6 = shufflevector <8 x i16> %T0, <8 x i16> %T1, <8 x i32> <i32 7, i32 undef, i32 undef, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
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ret <8 x i16> %tmp6
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; CHECK: shuf_8i16_7:
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; CHECK: punpckhwd
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; CHECK-NEXT: pshufd $-1
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}
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; Should generate with pshufd with masks $0, $85, $170, $255 (each mask is used 4 times)
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; Splat test for v16i8
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define <16 x i8> @shuf_16i8_8(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 0, i32 undef, i32 undef, i32 0, i32 undef, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_8:
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; CHECK: punpcklbw
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; CHECK-NEXT: punpcklbw
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; CHECK-NEXT: pshufd $0
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}
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define <16 x i8> @shuf_16i8_9(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef >
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_9:
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; CHECK: punpcklbw
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; CHECK-NEXT: punpcklbw
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; CHECK-NEXT: pshufd $85
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}
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define <16 x i8> @shuf_16i8_10(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_10:
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; CHECK: punpcklbw
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; CHECK-NEXT: punpcklbw
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; CHECK-NEXT: pshufd $-86
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}
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define <16 x i8> @shuf_16i8_11(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 3, i32 undef, i32 undef, i32 3, i32 undef, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_11:
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; CHECK: punpcklbw
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; CHECK-NEXT: punpcklbw
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; CHECK-NEXT: pshufd $-1
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}
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define <16 x i8> @shuf_16i8_12(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 4, i32 undef, i32 undef, i32 undef, i32 4, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef >
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_12:
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; CHECK: punpcklbw
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; CHECK-NEXT: punpckhbw
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; CHECK-NEXT: pshufd $0
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}
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define <16 x i8> @shuf_16i8_13(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 5, i32 undef, i32 undef, i32 5, i32 undef, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_13:
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; CHECK: punpcklbw
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; CHECK-NEXT: punpckhbw
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; CHECK-NEXT: pshufd $85
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}
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define <16 x i8> @shuf_16i8_14(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 6, i32 undef, i32 undef, i32 6, i32 undef, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_14:
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; CHECK: punpcklbw
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; CHECK-NEXT: punpckhbw
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; CHECK-NEXT: pshufd $-86
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}
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define <16 x i8> @shuf_16i8_15(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 7, i32 undef, i32 undef, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef >
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_15:
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; CHECK: punpcklbw
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; CHECK-NEXT: punpckhbw
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; CHECK-NEXT: pshufd $-1
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}
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define <16 x i8> @shuf_16i8_16(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 8, i32 undef, i32 undef, i32 8, i32 undef, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_16:
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; CHECK: punpckhbw
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; CHECK-NEXT: punpcklbw
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; CHECK-NEXT: pshufd $0
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}
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define <16 x i8> @shuf_16i8_17(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 9, i32 undef, i32 undef, i32 9, i32 undef, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9, i32 9>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_17:
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; CHECK: punpckhbw
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; CHECK-NEXT: punpcklbw
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; CHECK-NEXT: pshufd $85
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}
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define <16 x i8> @shuf_16i8_18(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 10, i32 undef, i32 undef, i32 10, i32 undef, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10, i32 10>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_18:
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; CHECK: punpckhbw
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; CHECK-NEXT: punpcklbw
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; CHECK-NEXT: pshufd $-86
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}
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define <16 x i8> @shuf_16i8_19(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 11, i32 undef, i32 undef, i32 11, i32 undef, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11, i32 11>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_19:
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; CHECK: punpckhbw
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; CHECK-NEXT: punpcklbw
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; CHECK-NEXT: pshufd $-1
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}
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define <16 x i8> @shuf_16i8_20(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 12, i32 undef, i32 undef, i32 12, i32 undef, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12, i32 12>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_20:
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; CHECK: punpckhbw
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; CHECK-NEXT: punpckhbw
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; CHECK-NEXT: pshufd $0
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}
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define <16 x i8> @shuf_16i8_21(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 13, i32 undef, i32 undef, i32 13, i32 undef, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13, i32 13>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_21:
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; CHECK: punpckhbw
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; CHECK-NEXT: punpckhbw
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; CHECK-NEXT: pshufd $85
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}
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define <16 x i8> @shuf_16i8_22(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 14, i32 undef, i32 undef, i32 14, i32 undef, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14, i32 14>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_22:
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; CHECK: punpckhbw
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; CHECK-NEXT: punpckhbw
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; CHECK-NEXT: pshufd $-86
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}
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define <16 x i8> @shuf_16i8_23(<16 x i8> %T0, <16 x i8> %T1) nounwind readnone {
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%tmp6 = shufflevector <16 x i8> %T0, <16 x i8> %T1, <16 x i32> <i32 15, i32 undef, i32 undef, i32 15, i32 undef, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>
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ret <16 x i8> %tmp6
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; CHECK: shuf_16i8_23:
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; CHECK: punpckhbw
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; CHECK-NEXT: punpckhbw
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; CHECK-NEXT: pshufd $-1
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}
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